/* SPDX-License-Identifier: GPL-2.0 */
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/**
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Support for Intel Camera Imaging ISP subsystem.
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Copyright (c) 2010 - 2015, Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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*/
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#ifndef _COMMON_ISP_CONST_H_
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#define _COMMON_ISP_CONST_H_
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/*#include "isp.h"*/ /* ISP_VEC_NELEMS */
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/* Binary independent constants */
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#ifndef NO_HOIST
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# define NO_HOIST HIVE_ATTRIBUTE((no_hoist))
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#endif
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#define NO_HOIST_CSE HIVE_ATTRIBUTE((no_hoist, no_cse))
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#define UNION struct /* Union constructors not allowed in C++ */
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#define XMEM_WIDTH_BITS HIVE_ISP_DDR_WORD_BITS
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#define XMEM_SHORTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS / 16)
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#define XMEM_INTS_PER_WORD (HIVE_ISP_DDR_WORD_BITS / 32)
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#define XMEM_POW2_BYTES_PER_WORD HIVE_ISP_DDR_WORD_BYTES
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#define BITS8_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 8)
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#define BITS16_ELEMENTS_PER_XMEM_ADDR CEIL_DIV(XMEM_WIDTH_BITS, 16)
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#if ISP_VEC_NELEMS == 64
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#define ISP_NWAY_LOG2 6
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#elif ISP_VEC_NELEMS == 32
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#define ISP_NWAY_LOG2 5
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#elif ISP_VEC_NELEMS == 16
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#define ISP_NWAY_LOG2 4
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#elif ISP_VEC_NELEMS == 8
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#define ISP_NWAY_LOG2 3
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#else
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#error "isp_const.h ISP_VEC_NELEMS must be one of {8, 16, 32, 64}"
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#endif
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/* *****************************
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* ISP input/output buffer sizes
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* ****************************/
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/* input image */
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#define INPUT_BUF_DMA_HEIGHT 2
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#define INPUT_BUF_HEIGHT 2 /* double buffer */
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#define OUTPUT_BUF_DMA_HEIGHT 2
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#define OUTPUT_BUF_HEIGHT 2 /* double buffer */
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#define OUTPUT_NUM_TRANSFERS 4
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/* GDC accelerator: Up/Down Scaling */
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/* These should be moved to the gdc_defs.h in the device */
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#define UDS_SCALING_N HRT_GDC_N
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/* AB: This should cover the zooming up to 16MP */
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#define UDS_MAX_OXDIM 5000
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/* We support maximally 2 planes with different parameters
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- luma and chroma (YUV420) */
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#define UDS_MAX_PLANES 2
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#define UDS_BLI_BLOCK_HEIGHT 2
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#define UDS_BCI_BLOCK_HEIGHT 4
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#define UDS_BLI_INTERP_ENVELOPE 1
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#define UDS_BCI_INTERP_ENVELOPE 3
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#define UDS_MAX_ZOOM_FAC 64
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/* Make it always one FPGA vector.
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Four FPGA vectors are required and
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four of them fit in one ASIC vector.*/
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#define UDS_MAX_CHUNKS 16
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#define ISP_LEFT_PADDING _ISP_LEFT_CROP_EXTRA(ISP_LEFT_CROPPING)
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#define ISP_LEFT_PADDING_VECS CEIL_DIV(ISP_LEFT_PADDING, ISP_VEC_NELEMS)
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/* in case of continuous the croppong of the current binary doesn't matter for the buffer calculation, but the cropping of the sp copy should be used */
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#define ISP_LEFT_PADDING_CONT _ISP_LEFT_CROP_EXTRA(SH_CSS_MAX_LEFT_CROPPING)
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#define ISP_LEFT_PADDING_VECS_CONT CEIL_DIV(ISP_LEFT_PADDING_CONT, ISP_VEC_NELEMS)
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#define CEIL_ROUND_DIV_STRIPE(width, stripe, padding) \
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CEIL_MUL(padding + CEIL_DIV(width - padding, stripe), ((ENABLE_RAW_BINNING || ENABLE_FIXED_BAYER_DS) ? 4 : 2))
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/* output (Y,U,V) image, 4:2:0 */
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#define MAX_VECTORS_PER_LINE \
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CEIL_ROUND_DIV_STRIPE(CEIL_DIV(ISP_MAX_INTERNAL_WIDTH, ISP_VEC_NELEMS), \
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ISP_NUM_STRIPES, \
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ISP_LEFT_PADDING_VECS)
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/*
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* ITERATOR_VECTOR_INCREMENT' explanation:
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* when striping an even number of iterations, one of the stripes is
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* one iteration wider than the other to account for overlap
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* so the calc for the output buffer vmem size is:
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* ((width[vectors]/num_of_stripes) + 2[vectors])
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*/
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#define MAX_VECTORS_PER_OUTPUT_LINE \
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CEIL_DIV(CEIL_DIV(ISP_MAX_OUTPUT_WIDTH, ISP_NUM_STRIPES) + ISP_LEFT_PADDING, ISP_VEC_NELEMS)
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/* Must be even due to interlaced bayer input */
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#define MAX_VECTORS_PER_INPUT_LINE CEIL_MUL((CEIL_DIV(ISP_MAX_INPUT_WIDTH, ISP_VEC_NELEMS) + ISP_LEFT_PADDING_VECS), 2)
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#define MAX_VECTORS_PER_INPUT_STRIPE CEIL_ROUND_DIV_STRIPE(MAX_VECTORS_PER_INPUT_LINE, \
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ISP_NUM_STRIPES, \
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ISP_LEFT_PADDING_VECS)
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/* Add 2 for left croppping */
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#define MAX_SP_RAW_COPY_VECTORS_PER_INPUT_LINE (CEIL_DIV(ISP_MAX_INPUT_WIDTH, ISP_VEC_NELEMS) + 2)
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#define MAX_VECTORS_PER_BUF_LINE \
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(MAX_VECTORS_PER_LINE + DUMMY_BUF_VECTORS)
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#define MAX_VECTORS_PER_BUF_INPUT_LINE \
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(MAX_VECTORS_PER_INPUT_STRIPE + DUMMY_BUF_VECTORS)
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#define MAX_OUTPUT_Y_FRAME_WIDTH \
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(MAX_VECTORS_PER_LINE * ISP_VEC_NELEMS)
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#define MAX_OUTPUT_Y_FRAME_SIMDWIDTH \
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MAX_VECTORS_PER_LINE
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#define MAX_OUTPUT_C_FRAME_WIDTH \
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(MAX_OUTPUT_Y_FRAME_WIDTH / 2)
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#define MAX_OUTPUT_C_FRAME_SIMDWIDTH \
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CEIL_DIV(MAX_OUTPUT_C_FRAME_WIDTH, ISP_VEC_NELEMS)
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/* should be even */
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#define NO_CHUNKING (OUTPUT_NUM_CHUNKS == 1)
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#define MAX_VECTORS_PER_CHUNK \
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(NO_CHUNKING ? MAX_VECTORS_PER_LINE \
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: 2 * CEIL_DIV(MAX_VECTORS_PER_LINE, \
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2 * OUTPUT_NUM_CHUNKS))
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#define MAX_C_VECTORS_PER_CHUNK \
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(MAX_VECTORS_PER_CHUNK / 2)
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/* should be even */
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#define MAX_VECTORS_PER_OUTPUT_CHUNK \
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(NO_CHUNKING ? MAX_VECTORS_PER_OUTPUT_LINE \
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: 2 * CEIL_DIV(MAX_VECTORS_PER_OUTPUT_LINE, \
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2 * OUTPUT_NUM_CHUNKS))
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#define MAX_C_VECTORS_PER_OUTPUT_CHUNK \
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(MAX_VECTORS_PER_OUTPUT_CHUNK / 2)
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/* should be even */
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#define MAX_VECTORS_PER_INPUT_CHUNK \
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(INPUT_NUM_CHUNKS == 1 ? MAX_VECTORS_PER_INPUT_STRIPE \
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: 2 * CEIL_DIV(MAX_VECTORS_PER_INPUT_STRIPE, \
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2 * OUTPUT_NUM_CHUNKS))
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#define DEFAULT_C_SUBSAMPLING 2
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/****** DMA buffer properties */
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#define RAW_BUF_LINES ((ENABLE_RAW_BINNING || ENABLE_FIXED_BAYER_DS) ? 4 : 2)
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#define RAW_BUF_STRIDE \
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(BINARY_ID == SH_CSS_BINARY_ID_POST_ISP ? MAX_VECTORS_PER_INPUT_CHUNK : \
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ISP_NUM_STRIPES > 1 ? MAX_VECTORS_PER_INPUT_STRIPE + _ISP_EXTRA_PADDING_VECS : \
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!ENABLE_CONTINUOUS ? MAX_VECTORS_PER_INPUT_LINE : \
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MAX_VECTORS_PER_INPUT_CHUNK)
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/* [isp vmem] table size[vectors] per line per color (GR,R,B,GB),
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multiples of NWAY */
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#define ISP2400_SCTBL_VECTORS_PER_LINE_PER_COLOR \
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CEIL_DIV(ISP2400_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS)
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#define ISP2401_SCTBL_VECTORS_PER_LINE_PER_COLOR \
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CEIL_DIV(ISP2401_SH_CSS_MAX_SCTBL_WIDTH_PER_COLOR, ISP_VEC_NELEMS)
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/* [isp vmem] table size[vectors] per line for 4colors (GR,R,B,GB),
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multiples of NWAY */
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#define SCTBL_VECTORS_PER_LINE \
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(SCTBL_VECTORS_PER_LINE_PER_COLOR * IA_CSS_SC_NUM_COLORS)
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/*************/
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/* Format for fixed primaries */
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#define ISP_FIXED_PRIMARY_FORMAT IA_CSS_FRAME_FORMAT_NV12
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#endif /* _COMMON_ISP_CONST_H_ */
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