/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* HiSilicon SoC Hardware event counters support
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*
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* Copyright (C) 2017 Hisilicon Limited
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* Author: Anurup M <anurup.m@huawei.com>
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* Shaokun Zhang <zhangshaokun@hisilicon.com>
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*
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* This code is based on the uncore PMUs like arm-cci and arm-ccn.
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*/
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#ifndef __HISI_UNCORE_PMU_H__
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#define __HISI_UNCORE_PMU_H__
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#include <linux/cpumask.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/perf_event.h>
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#include <linux/types.h>
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#undef pr_fmt
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#define pr_fmt(fmt) "hisi_pmu: " fmt
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#define HISI_MAX_COUNTERS 0x10
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#define to_hisi_pmu(p) (container_of(p, struct hisi_pmu, pmu))
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#define HISI_PMU_ATTR(_name, _func, _config) \
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(&((struct dev_ext_attribute[]) { \
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{ __ATTR(_name, 0444, _func, NULL), (void *)_config } \
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})[0].attr.attr)
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#define HISI_PMU_FORMAT_ATTR(_name, _config) \
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HISI_PMU_ATTR(_name, hisi_format_sysfs_show, (void *)_config)
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#define HISI_PMU_EVENT_ATTR(_name, _config) \
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HISI_PMU_ATTR(_name, hisi_event_sysfs_show, (unsigned long)_config)
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struct hisi_pmu;
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struct hisi_uncore_ops {
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void (*write_evtype)(struct hisi_pmu *, int, u32);
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int (*get_event_idx)(struct perf_event *);
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u64 (*read_counter)(struct hisi_pmu *, struct hw_perf_event *);
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void (*write_counter)(struct hisi_pmu *, struct hw_perf_event *, u64);
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void (*enable_counter)(struct hisi_pmu *, struct hw_perf_event *);
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void (*disable_counter)(struct hisi_pmu *, struct hw_perf_event *);
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void (*enable_counter_int)(struct hisi_pmu *, struct hw_perf_event *);
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void (*disable_counter_int)(struct hisi_pmu *, struct hw_perf_event *);
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void (*start_counters)(struct hisi_pmu *);
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void (*stop_counters)(struct hisi_pmu *);
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};
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struct hisi_pmu_hwevents {
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struct perf_event *hw_events[HISI_MAX_COUNTERS];
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DECLARE_BITMAP(used_mask, HISI_MAX_COUNTERS);
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};
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/* Generic pmu struct for different pmu types */
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struct hisi_pmu {
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struct pmu pmu;
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const struct hisi_uncore_ops *ops;
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struct hisi_pmu_hwevents pmu_events;
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/* associated_cpus: All CPUs associated with the PMU */
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cpumask_t associated_cpus;
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/* CPU used for counting */
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int on_cpu;
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int irq;
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struct device *dev;
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struct hlist_node node;
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int sccl_id;
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int ccl_id;
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void __iomem *base;
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/* the ID of the PMU modules */
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u32 index_id;
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int num_counters;
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int counter_bits;
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/* check event code range */
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int check_event;
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};
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int hisi_uncore_pmu_counter_valid(struct hisi_pmu *hisi_pmu, int idx);
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int hisi_uncore_pmu_get_event_idx(struct perf_event *event);
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void hisi_uncore_pmu_read(struct perf_event *event);
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int hisi_uncore_pmu_add(struct perf_event *event, int flags);
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void hisi_uncore_pmu_del(struct perf_event *event, int flags);
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void hisi_uncore_pmu_start(struct perf_event *event, int flags);
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void hisi_uncore_pmu_stop(struct perf_event *event, int flags);
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void hisi_uncore_pmu_set_event_period(struct perf_event *event);
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void hisi_uncore_pmu_event_update(struct perf_event *event);
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int hisi_uncore_pmu_event_init(struct perf_event *event);
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void hisi_uncore_pmu_enable(struct pmu *pmu);
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void hisi_uncore_pmu_disable(struct pmu *pmu);
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ssize_t hisi_event_sysfs_show(struct device *dev,
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struct device_attribute *attr, char *buf);
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ssize_t hisi_format_sysfs_show(struct device *dev,
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struct device_attribute *attr, char *buf);
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ssize_t hisi_cpumask_sysfs_show(struct device *dev,
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struct device_attribute *attr, char *buf);
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int hisi_uncore_pmu_online_cpu(unsigned int cpu, struct hlist_node *node);
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int hisi_uncore_pmu_offline_cpu(unsigned int cpu, struct hlist_node *node);
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#endif /* __HISI_UNCORE_PMU_H__ */
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