/*
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* Copyright (c) 2004-2008 Chelsio, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef _FIRMWARE_EXPORTS_H_
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#define _FIRMWARE_EXPORTS_H_
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/* WR OPCODES supported by the firmware.
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*/
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#define FW_WROPCODE_FORWARD 0x01
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#define FW_WROPCODE_BYPASS 0x05
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#define FW_WROPCODE_TUNNEL_TX_PKT 0x03
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#define FW_WROPOCDE_ULPTX_DATA_SGL 0x00
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#define FW_WROPCODE_ULPTX_MEM_READ 0x02
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#define FW_WROPCODE_ULPTX_PKT 0x04
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#define FW_WROPCODE_ULPTX_INVALIDATE 0x06
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#define FW_WROPCODE_TUNNEL_RX_PKT 0x07
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#define FW_WROPCODE_OFLD_GETTCB_RPL 0x08
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#define FW_WROPCODE_OFLD_CLOSE_CON 0x09
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#define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ 0x0A
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#define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL 0x0F
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#define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ 0x0B
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#define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL 0x0C
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#define FW_WROPCODE_OFLD_TX_DATA 0x0D
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#define FW_WROPCODE_OFLD_TX_DATA_ACK 0x0E
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#define FW_WROPCODE_RI_RDMA_INIT 0x10
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#define FW_WROPCODE_RI_RDMA_WRITE 0x11
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#define FW_WROPCODE_RI_RDMA_READ_REQ 0x12
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#define FW_WROPCODE_RI_RDMA_READ_RESP 0x13
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#define FW_WROPCODE_RI_SEND 0x14
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#define FW_WROPCODE_RI_TERMINATE 0x15
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#define FW_WROPCODE_RI_RDMA_READ 0x16
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#define FW_WROPCODE_RI_RECEIVE 0x17
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#define FW_WROPCODE_RI_BIND_MW 0x18
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#define FW_WROPCODE_RI_FASTREGISTER_MR 0x19
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#define FW_WROPCODE_RI_LOCAL_INV 0x1A
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#define FW_WROPCODE_RI_MODIFY_QP 0x1B
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#define FW_WROPCODE_RI_BYPASS 0x1C
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#define FW_WROPOCDE_RSVD 0x1E
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#define FW_WROPCODE_SGE_EGRESSCONTEXT_RR 0x1F
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#define FW_WROPCODE_MNGT 0x1D
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#define FW_MNGTOPCODE_PKTSCHED_SET 0x00
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/* Maximum size of a WR sent from the host, limited by the SGE.
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*
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* Note: WR coming from ULP or TP are only limited by CIM.
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*/
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#define FW_WR_SIZE 128
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/* Maximum number of outstanding WRs sent from the host. Value must be
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* programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by
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* offload modules to limit the number of WRs per connection.
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*/
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#define FW_T3_WR_NUM 16
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#define FW_N3_WR_NUM 7
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#ifndef N3
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# define FW_WR_NUM FW_T3_WR_NUM
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#else
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# define FW_WR_NUM FW_N3_WR_NUM
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#endif
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/* FW_TUNNEL_NUM corresponds to the number of supported TUNNEL Queues. These
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* queues must start at SGE Egress Context FW_TUNNEL_SGEEC_START and must
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* start at 'TID' (or 'uP Token') FW_TUNNEL_TID_START.
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*
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* Ingress Traffic (e.g. DMA completion credit) for TUNNEL Queue[i] is sent
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* to RESP Queue[i].
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*/
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#define FW_TUNNEL_NUM 8
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#define FW_TUNNEL_SGEEC_START 8
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#define FW_TUNNEL_TID_START 65544
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/* FW_CTRL_NUM corresponds to the number of supported CTRL Queues. These queues
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* must start at SGE Egress Context FW_CTRL_SGEEC_START and must start at 'TID'
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* (or 'uP Token') FW_CTRL_TID_START.
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*
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* Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i].
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*/
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#define FW_CTRL_NUM 8
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#define FW_CTRL_SGEEC_START 65528
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#define FW_CTRL_TID_START 65536
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/* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These
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* queues must start at SGE Egress Context FW_OFLD_SGEEC_START.
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*
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* Note: the 'uP Token' in the SGE Egress Context fields is irrelevant for
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* OFFLOAD Queues, as the host is responsible for providing the correct TID in
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* every WR.
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*
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* Ingress Trafffic for OFFLOAD Queue[i] is sent to RESP Queue[i].
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*/
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#define FW_OFLD_NUM 8
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#define FW_OFLD_SGEEC_START 0
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/*
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*
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*/
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#define FW_RI_NUM 1
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#define FW_RI_SGEEC_START 65527
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#define FW_RI_TID_START 65552
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/*
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* The RX_PKT_TID
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*/
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#define FW_RX_PKT_NUM 1
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#define FW_RX_PKT_TID_START 65553
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/* FW_WRC_NUM corresponds to the number of Work Request Context that supported
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* by the firmware.
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*/
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#define FW_WRC_NUM \
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(65536 + FW_TUNNEL_NUM + FW_CTRL_NUM + FW_RI_NUM + FW_RX_PKT_NUM)
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/*
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* FW type and version.
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*/
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#define S_FW_VERSION_TYPE 28
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#define M_FW_VERSION_TYPE 0xF
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#define V_FW_VERSION_TYPE(x) ((x) << S_FW_VERSION_TYPE)
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#define G_FW_VERSION_TYPE(x) \
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(((x) >> S_FW_VERSION_TYPE) & M_FW_VERSION_TYPE)
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#define S_FW_VERSION_MAJOR 16
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#define M_FW_VERSION_MAJOR 0xFFF
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#define V_FW_VERSION_MAJOR(x) ((x) << S_FW_VERSION_MAJOR)
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#define G_FW_VERSION_MAJOR(x) \
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(((x) >> S_FW_VERSION_MAJOR) & M_FW_VERSION_MAJOR)
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#define S_FW_VERSION_MINOR 8
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#define M_FW_VERSION_MINOR 0xFF
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#define V_FW_VERSION_MINOR(x) ((x) << S_FW_VERSION_MINOR)
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#define G_FW_VERSION_MINOR(x) \
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(((x) >> S_FW_VERSION_MINOR) & M_FW_VERSION_MINOR)
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#define S_FW_VERSION_MICRO 0
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#define M_FW_VERSION_MICRO 0xFF
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#define V_FW_VERSION_MICRO(x) ((x) << S_FW_VERSION_MICRO)
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#define G_FW_VERSION_MICRO(x) \
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(((x) >> S_FW_VERSION_MICRO) & M_FW_VERSION_MICRO)
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#endif /* _FIRMWARE_EXPORTS_H_ */
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