/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Applied Micro X-Gene SoC Ethernet v2 Driver
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*
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* Copyright (c) 2017, Applied Micro Circuits Corporation
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* Author(s): Iyappan Subramanian <isubramanian@apm.com>
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* Keyur Chudgar <kchudgar@apm.com>
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*/
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#ifndef __XGENE_ENET_V2_ENET_H__
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#define __XGENE_ENET_V2_ENET_H__
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#define ENET_CLKEN 0xc008
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#define ENET_SRST 0xc000
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#define ENET_SHIM 0xc010
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#define CFG_MEM_RAM_SHUTDOWN 0xd070
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#define BLOCK_MEM_RDY 0xd074
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#define MEM_RDY 0xffffffff
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#define DEVM_ARAUX_COH BIT(19)
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#define DEVM_AWAUX_COH BIT(3)
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#define CFG_FORCE_LINK_STATUS_EN 0x229c
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#define FORCE_LINK_STATUS 0x22a0
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#define CFG_LINK_AGGR_RESUME 0x27c8
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#define RX_DV_GATE_REG 0x2dfc
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void xge_wr_csr(struct xge_pdata *pdata, u32 offset, u32 val);
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u32 xge_rd_csr(struct xge_pdata *pdata, u32 offset);
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int xge_port_reset(struct net_device *ndev);
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void xge_port_init(struct net_device *ndev);
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#endif /* __XGENE_ENET_V2_ENET__H__ */
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