/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Techpoint Lib
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*
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* Copyright (C) 2023 Rockchip Electronics Co., Ltd.
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*/
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#ifndef _TECHPOINT_COMMON_H
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#define _TECHPOINT_COMMON_H
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <linux/sysfs.h>
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#include <linux/slab.h>
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#include <linux/version.h>
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#include <linux/rk-camera-module.h>
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#include <media/media-entity.h>
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#include <media/v4l2-async.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-subdev.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/rk-preisp.h>
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#include <linux/sched.h>
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#include <linux/kthread.h>
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#include <linux/of.h>
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#include <linux/of_graph.h>
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#define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x0)
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#define TECHPOINT_CAMERA_XVCLK_FREQ "xvclk_freq"
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#define TECHPOINT_TEST_PATTERN 0
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#define DEF_1080P 1
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#define TECHPOINT_SHARING_POWER 1
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#define INPUT_STATUS_REG 0x01
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#define PAGE_REG 0x40
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#define CHIP_ID_H_REG 0xFE
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#define CHIP_ID_L_REG 0xFF
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#define INPUT_STATUS_MASK 0x80
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enum techpoint_chips {
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CHIP_UNKNOWN = 0,
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CHIP_TP2855,
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CHIP_TP2815,
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CHIP_TP9930,
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CHIP_TP9950,
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};
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enum techpoint_input_type {
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TECHPOINT_MIPI = 0,
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TECHPOINT_DVP_BT1120,
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TECHPOINT_DVP_BT565,
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};
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enum techpoint_support_reso {
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TECHPOINT_S_RESO_720P_25 = 0,
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TECHPOINT_S_RESO_1080P_25,
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TECHPOINT_S_RESO_720P_30,
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TECHPOINT_S_RESO_1080P_30,
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TECHPOINT_S_RESO_SD,
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TECHPOINT_S_RESO_PAL,
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TECHPOINT_S_RESO_NTSC,
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TECHPOINT_S_RESO_NUMS,
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};
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struct techpoint_video_modes {
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u32 bus_fmt;
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u32 width;
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u32 height;
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struct v4l2_fract max_fps;
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u32 bpp;
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u32 lane;
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s64 link_freq_value;
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u32 vc[PAD_MAX];
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const struct regval *common_reg_list;
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int common_reg_size;
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enum techpoint_support_reso channel_reso[PAD_MAX];
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};
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/* Audio output port formats */
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enum techpoint_audfmts {
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AUDFMT_I2S = 0,
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AUDFMT_DSP,
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};
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struct techpoint_audio {
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enum techpoint_audfmts audfmt;
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int mclk_fs;
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int cascade_num;
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int cascade_order;
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int slave_num;
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struct techpoint *slave_tp[3];
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};
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struct techpoint {
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struct device dev;
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struct i2c_client *client;
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struct clk *xvclk;
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struct gpio_desc *reset_gpio;
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struct gpio_desc *power_gpio;
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struct pinctrl *pinctrl;
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struct pinctrl_state *pins_sleep;
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struct pinctrl_state *pins_default;
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struct media_pad pad[PAD_MAX];
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struct v4l2_subdev subdev;
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struct v4l2_ctrl *pixel_rate_ctrl;
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struct v4l2_ctrl *link_freq_ctrl;
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struct v4l2_ctrl_handler ctrl_handler;
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struct mutex mutex;
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struct regulator_bulk_data *supplies;
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u32 xvclk_freq_value;
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struct techpoint_audio *audio_in;
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struct techpoint_audio *audio_out;
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int i2c_idx;
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u32 data_lanes;
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enum techpoint_chips chip_id;
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struct techpoint_video_modes *video_modes;
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struct techpoint_video_modes *cur_video_mode;
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u32 video_modes_num;
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enum techpoint_input_type input_type;
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u32 module_index;
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const char *module_facing;
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const char *module_name;
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const char *len_name;
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bool power_on;
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bool streaming;
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bool do_reset;
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u8 detect_status[PAD_MAX];
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struct task_struct *detect_thread;
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};
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#endif // _TECHPOINT_COMMON_H
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