// SPDX-License-Identifier: GPL-2.0
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/*
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* Google Veyron (and derivatives) fragment for the max98090 audio
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* codec and analog headphone jack.
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*
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* Copyright 2016 Google, Inc
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*/
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/ {
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sound {
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compatible = "rockchip,rockchip-audio-max98090";
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pinctrl-names = "default";
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pinctrl-0 = <&mic_det>, <&hp_det>;
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rockchip,model = "VEYRON-I2S";
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rockchip,i2s-controller = <&i2s>;
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rockchip,audio-codec = <&max98090>;
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rockchip,hp-det-gpios = <&gpio6 RK_PA5 GPIO_ACTIVE_HIGH>;
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rockchip,mic-det-gpios = <&gpio6 RK_PB3 GPIO_ACTIVE_LOW>;
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rockchip,headset-codec = <&headsetcodec>;
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rockchip,hdmi-codec = <&hdmi>;
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};
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};
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&i2c2 {
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max98090: max98090@10 {
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compatible = "maxim,max98090";
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reg = <0x10>;
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interrupt-parent = <&gpio6>;
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interrupts = <RK_PA7 IRQ_TYPE_EDGE_FALLING>;
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clock-names = "mclk";
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clocks = <&cru SCLK_I2S0_OUT>;
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pinctrl-names = "default";
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pinctrl-0 = <&int_codec>;
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};
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};
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&i2c4 {
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headsetcodec: ts3a227e@3b {
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compatible = "ti,ts3a227e";
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reg = <0x3b>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&ts3a227e_int_l>;
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ti,micbias = <7>; /* MICBIAS = 2.8V */
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};
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};
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&i2s {
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status = "okay";
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};
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&io_domains {
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audio-supply = <&vcc18_codec>;
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};
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&rk808 {
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vcc10-supply = <&vcc33_sys>;
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regulators {
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vcc18_codec: LDO_REG6 {
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regulator-name = "vcc18_codec";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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};
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&pinctrl {
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codec {
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hp_det: hp-det {
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rockchip,pins = <6 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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/*
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* HACK: We're going to _pull down_ this _active low_ interrupt
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* so that it never fires. We don't need this interrupt because
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* we've got a ts3a227e chip but the driver requires it.
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*/
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int_codec: int-codec {
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rockchip,pins = <6 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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mic_det: mic-det {
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rockchip,pins = <6 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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headset {
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ts3a227e_int_l: ts3a227e-int-l {
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rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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