* Amlogic Audio TDM formatters
|
|
Required properties:
|
- compatible: 'amlogic,axg-tdmin' or
|
'amlogic,axg-tdmout' or
|
'amlogic,g12a-tdmin' or
|
'amlogic,g12a-tdmout' or
|
'amlogic,sm1-tdmin' or
|
'amlogic,sm1-tdmout
|
- reg: physical base address of the controller and length of memory
|
mapped region.
|
- clocks: list of clock phandle, one for each entry clock-names.
|
- clock-names: should contain the following:
|
* "pclk" : peripheral clock.
|
* "sclk" : bit clock.
|
* "sclk_sel" : bit clock input multiplexer.
|
* "lrclk" : sample clock
|
* "lrclk_sel": sample clock input multiplexer
|
|
Optional property:
|
- resets: phandle to the dedicated reset line of the tdm formatter.
|
|
Example of TDMOUT_A on the S905X2 SoC:
|
|
tdmout_a: audio-controller@500 {
|
compatible = "amlogic,axg-tdmout";
|
reg = <0x0 0x500 0x0 0x40>;
|
resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
|
clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
|
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
|
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
|
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
|
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
|
clock-names = "pclk", "sclk", "sclk_sel",
|
"lrclk", "lrclk_sel";
|
};
|
