ROCKCHIP HDMI PHY WITH INNO IP BLOCK
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Required properties:
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- compatible : "rockchip,rk3228-hdmi-phy",
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"rockchip,rk3328-hdmi-phy";
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- reg : the address offset of register for hdmi phy configuration.
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- #phy-cells : must be 0. See ./phy-bindings.txt for details.
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- clocks and clock-names:
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- the "sysclk" clock is required by the phy module, used to system
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control and register configuration
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- the "refclk" clock is reference crystal oscillator clock input
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to PLL
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- #clock-cells: should be 0.
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- clock-output-names : shall be the corresponding names of the outputs.
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- rockchip,phy-table: the parameter table of hdmi phy configuration.
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Example:
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hdmi_phy: hdmi-phy@12030000 {
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compatible = "rockchip,rk3228-hdmi-phy";
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reg = <0x12030000 0x10000>;
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#phy-cells = <0>;
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clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>;
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clock-names = "sysclk", "refclk";
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#clock-cells = <0>;
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clock-output-names = "hdmiphy_phy";
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rockchip,phy-table =
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<165000000 0x07 0x0a 0x0a 0x0a 0x00 0x00 0x08
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0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>,
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<340000000 0x0b 0x0d 0x0d 0x0d 0x07 0x15 0x08
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0x08 0x08 0x3f 0xac 0xcc 0xcd 0xdd>,
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<594000000 0x10 0x1a 0x1a 0x1a 0x07 0x15 0x08
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0x08 0x08 0x00 0xac 0xcc 0xcc 0xcc>;
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status = "disabled";
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};
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Then the PHY can be used in other nodes such as:
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hdmi: hdmi@200a0000 {
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compatible = "rockchip,rk3228-dw-hdmi";
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...
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phys = <&hdmi_phy>;
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phy-names = "hdmi_phy";
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...
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};
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