Device Tree bindings for Arm Komeda display driver
|
|
Required properties:
|
- compatible: Should be "arm,mali-d71"
|
- reg: Physical base address and length of the registers in the system
|
- interrupts: the interrupt line number of the device in the system
|
- clocks: A list of phandle + clock-specifier pairs, one for each entry
|
in 'clock-names'
|
- clock-names: A list of clock names. It should contain:
|
- "aclk": for the main processor clock
|
- #address-cells: Must be 1
|
- #size-cells: Must be 0
|
- iommus: configure the stream id to IOMMU, Must be configured if want to
|
enable iommu in display. for how to configure this node please reference
|
devicetree/bindings/iommu/arm,smmu-v3.txt,
|
devicetree/bindings/iommu/iommu.txt
|
|
Required properties for sub-node: pipeline@nq
|
Each device contains one or two pipeline sub-nodes (at least one), each
|
pipeline node should provide properties:
|
- reg: Zero-indexed identifier for the pipeline
|
- clocks: A list of phandle + clock-specifier pairs, one for each entry
|
in 'clock-names'
|
- clock-names: should contain:
|
- "pxclk": pixel clock
|
|
- port: each pipeline connect to an encoder input port. The connection is
|
modeled using the OF graph bindings specified in
|
Documentation/devicetree/bindings/graph.txt
|
|
Optional properties:
|
- memory-region: phandle to a node describing memory (see
|
Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
|
to be used for the framebuffer; if not present, the framebuffer may
|
be located anywhere in memory.
|
|
Example:
|
/ {
|
...
|
|
dp0: display@c00000 {
|
#address-cells = <1>;
|
#size-cells = <0>;
|
compatible = "arm,mali-d71";
|
reg = <0xc00000 0x20000>;
|
interrupts = <0 168 4>;
|
clocks = <&dpu_aclk>;
|
clock-names = "aclk";
|
iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
|
<&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
|
<&smmu 8>, <&smmu 9>;
|
|
dp0_pipe0: pipeline@0 {
|
clocks = <&fpgaosc2>;
|
clock-names = "pxclk";
|
reg = <0>;
|
|
port {
|
dp0_pipe0_out: endpoint {
|
remote-endpoint = <&db_dvi0_in>;
|
};
|
};
|
};
|
|
dp0_pipe1: pipeline@1 {
|
clocks = <&fpgaosc2>;
|
clock-names = "pxclk";
|
reg = <1>;
|
|
port {
|
dp0_pipe1_out: endpoint {
|
remote-endpoint = <&db_dvi1_in>;
|
};
|
};
|
};
|
};
|
...
|
};
|
