From 574e7950bd6b34e9e2cacce18c802b45505d1d0a Mon Sep 17 00:00:00 2001
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From: Richard Earnshaw <rearnsha@arm.com>
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Date: Fri, 18 Jun 2021 17:16:25 +0100
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Subject: [PATCH] arm: add erratum mitigation to __gnu_cmse_nonsecure_call
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[PR102035]
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Add the recommended erratum mitigation sequence to
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__gnu_cmse_nonsecure_call for use on Armv8-m.main devices. Since this
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is in the library code we cannot know in advance whether the core we
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are running on will be affected by this, so always enable it.
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libgcc:
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PR target/102035
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* config/arm/cmse_nonsecure_call.S (__gnu_cmse_nonsecure_call):
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Add vlldm erratum work-around.
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CVE: CVE-2021-35465
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Upstream-Status: Backport[https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=574e7950bd6b34e9e2cacce18c802b45505d1d0a]
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Signed-off-by: Pgowda <pgowda.cve@gmail.com>
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---
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libgcc/config/arm/cmse_nonsecure_call.S | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/libgcc/config/arm/cmse_nonsecure_call.S b/libgcc/config/arm/cmse_nonsecure_call.S
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--- a/libgcc/config/arm/cmse_nonsecure_call.S
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+++ b/libgcc/config/arm/cmse_nonsecure_call.S
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@@ -102,6 +102,11 @@ blxns r4
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#ifdef __ARM_PCS_VFP
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vpop.f64 {d8-d15}
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#else
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+/* VLLDM erratum mitigation sequence. */
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+mrs r5, control
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+tst r5, #8 /* CONTROL_S.SFPA */
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+it ne
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+.inst.w 0xeeb00a40 /* vmovne s0, s0 */
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vlldm sp /* Lazy restore of d0-d16 and FPSCR. */
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add sp, sp, #0x88 /* Free space used to save floating point registers. */
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#endif /* __ARM_PCS_VFP */
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