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<title>Using the GNU Compiler Collection (GCC): FRV Options</title>
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<a name="FRV-Options"></a>
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<div class="header">
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<p>
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Next: <a href="GNU_002fLinux-Options.html#GNU_002fLinux-Options" accesskey="n" rel="next">GNU/Linux Options</a>, Previous: <a href="FT32-Options.html#FT32-Options" accesskey="p" rel="prev">FT32 Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="FRV-Options-1"></a>
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<h4 class="subsection">3.18.14 FRV Options</h4>
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<a name="index-FRV-Options"></a>
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<dl compact="compact">
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<dt><code>-mgpr-32</code></dt>
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<dd><a name="index-mgpr_002d32"></a>
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<p>Only use the first 32 general-purpose registers.
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</p>
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</dd>
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<dt><code>-mgpr-64</code></dt>
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<dd><a name="index-mgpr_002d64"></a>
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<p>Use all 64 general-purpose registers.
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</p>
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</dd>
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<dt><code>-mfpr-32</code></dt>
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<dd><a name="index-mfpr_002d32"></a>
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<p>Use only the first 32 floating-point registers.
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</p>
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</dd>
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<dt><code>-mfpr-64</code></dt>
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<dd><a name="index-mfpr_002d64"></a>
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<p>Use all 64 floating-point registers.
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</p>
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</dd>
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<dt><code>-mhard-float</code></dt>
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<dd><a name="index-mhard_002dfloat"></a>
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<p>Use hardware instructions for floating-point operations.
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</p>
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</dd>
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<dt><code>-msoft-float</code></dt>
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<dd><a name="index-msoft_002dfloat-2"></a>
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<p>Use library routines for floating-point operations.
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</p>
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</dd>
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<dt><code>-malloc-cc</code></dt>
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<dd><a name="index-malloc_002dcc"></a>
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<p>Dynamically allocate condition code registers.
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</p>
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</dd>
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<dt><code>-mfixed-cc</code></dt>
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<dd><a name="index-mfixed_002dcc"></a>
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<p>Do not try to dynamically allocate condition code registers, only
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use <code>icc0</code> and <code>fcc0</code>.
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</p>
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</dd>
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<dt><code>-mdword</code></dt>
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<dd><a name="index-mdword"></a>
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<p>Change ABI to use double word insns.
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</p>
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</dd>
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<dt><code>-mno-dword</code></dt>
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<dd><a name="index-mno_002ddword"></a>
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<p>Do not use double word instructions.
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</p>
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</dd>
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<dt><code>-mdouble</code></dt>
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<dd><a name="index-mdouble"></a>
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<p>Use floating-point double instructions.
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</p>
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</dd>
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<dt><code>-mno-double</code></dt>
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<dd><a name="index-mno_002ddouble"></a>
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<p>Do not use floating-point double instructions.
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</p>
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</dd>
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<dt><code>-mmedia</code></dt>
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<dd><a name="index-mmedia"></a>
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<p>Use media instructions.
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</p>
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</dd>
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<dt><code>-mno-media</code></dt>
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<dd><a name="index-mno_002dmedia"></a>
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<p>Do not use media instructions.
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</p>
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</dd>
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<dt><code>-mmuladd</code></dt>
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<dd><a name="index-mmuladd"></a>
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<p>Use multiply and add/subtract instructions.
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</p>
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</dd>
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<dt><code>-mno-muladd</code></dt>
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<dd><a name="index-mno_002dmuladd"></a>
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<p>Do not use multiply and add/subtract instructions.
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</p>
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</dd>
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<dt><code>-mfdpic</code></dt>
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<dd><a name="index-mfdpic"></a>
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<p>Select the FDPIC ABI, which uses function descriptors to represent
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pointers to functions. Without any PIC/PIE-related options, it
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implies <samp>-fPIE</samp>. With <samp>-fpic</samp> or <samp>-fpie</samp>, it
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assumes GOT entries and small data are within a 12-bit range from the
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GOT base address; with <samp>-fPIC</samp> or <samp>-fPIE</samp>, GOT offsets
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are computed with 32 bits.
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With a ‘<samp>bfin-elf</samp>’ target, this option implies <samp>-msim</samp>.
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</p>
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</dd>
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<dt><code>-minline-plt</code></dt>
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<dd><a name="index-minline_002dplt-1"></a>
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<p>Enable inlining of PLT entries in function calls to functions that are
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not known to bind locally. It has no effect without <samp>-mfdpic</samp>.
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It’s enabled by default if optimizing for speed and compiling for
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shared libraries (i.e., <samp>-fPIC</samp> or <samp>-fpic</samp>), or when an
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optimization option such as <samp>-O3</samp> or above is present in the
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command line.
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</p>
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</dd>
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<dt><code>-mTLS</code></dt>
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<dd><a name="index-mTLS"></a>
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<p>Assume a large TLS segment when generating thread-local code.
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</p>
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</dd>
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<dt><code>-mtls</code></dt>
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<dd><a name="index-mtls"></a>
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<p>Do not assume a large TLS segment when generating thread-local code.
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</p>
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</dd>
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<dt><code>-mgprel-ro</code></dt>
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<dd><a name="index-mgprel_002dro"></a>
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<p>Enable the use of <code>GPREL</code> relocations in the FDPIC ABI for data
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that is known to be in read-only sections. It’s enabled by default,
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except for <samp>-fpic</samp> or <samp>-fpie</samp>: even though it may help
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make the global offset table smaller, it trades 1 instruction for 4.
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With <samp>-fPIC</samp> or <samp>-fPIE</samp>, it trades 3 instructions for 4,
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one of which may be shared by multiple symbols, and it avoids the need
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for a GOT entry for the referenced symbol, so it’s more likely to be a
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win. If it is not, <samp>-mno-gprel-ro</samp> can be used to disable it.
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</p>
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</dd>
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<dt><code>-multilib-library-pic</code></dt>
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<dd><a name="index-multilib_002dlibrary_002dpic"></a>
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<p>Link with the (library, not FD) pic libraries. It’s implied by
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<samp>-mlibrary-pic</samp>, as well as by <samp>-fPIC</samp> and
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<samp>-fpic</samp> without <samp>-mfdpic</samp>. You should never have to use
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it explicitly.
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</p>
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</dd>
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<dt><code>-mlinked-fp</code></dt>
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<dd><a name="index-mlinked_002dfp"></a>
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<p>Follow the EABI requirement of always creating a frame pointer whenever
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a stack frame is allocated. This option is enabled by default and can
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be disabled with <samp>-mno-linked-fp</samp>.
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</p>
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</dd>
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<dt><code>-mlong-calls</code></dt>
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<dd><a name="index-mlong_002dcalls-4"></a>
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<p>Use indirect addressing to call functions outside the current
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compilation unit. This allows the functions to be placed anywhere
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within the 32-bit address space.
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</p>
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</dd>
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<dt><code>-malign-labels</code></dt>
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<dd><a name="index-malign_002dlabels"></a>
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<p>Try to align labels to an 8-byte boundary by inserting NOPs into the
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previous packet. This option only has an effect when VLIW packing
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is enabled. It doesn’t create new packets; it merely adds NOPs to
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existing ones.
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</p>
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</dd>
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<dt><code>-mlibrary-pic</code></dt>
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<dd><a name="index-mlibrary_002dpic"></a>
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<p>Generate position-independent EABI code.
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</p>
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</dd>
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<dt><code>-macc-4</code></dt>
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<dd><a name="index-macc_002d4"></a>
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<p>Use only the first four media accumulator registers.
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</p>
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</dd>
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<dt><code>-macc-8</code></dt>
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<dd><a name="index-macc_002d8"></a>
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<p>Use all eight media accumulator registers.
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</p>
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</dd>
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<dt><code>-mpack</code></dt>
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<dd><a name="index-mpack"></a>
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<p>Pack VLIW instructions.
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</p>
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</dd>
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<dt><code>-mno-pack</code></dt>
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<dd><a name="index-mno_002dpack"></a>
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<p>Do not pack VLIW instructions.
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</p>
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</dd>
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<dt><code>-mno-eflags</code></dt>
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<dd><a name="index-mno_002deflags"></a>
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<p>Do not mark ABI switches in e_flags.
|
</p>
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</dd>
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<dt><code>-mcond-move</code></dt>
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<dd><a name="index-mcond_002dmove"></a>
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<p>Enable the use of conditional-move instructions (default).
|
</p>
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<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
|
</dd>
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<dt><code>-mno-cond-move</code></dt>
|
<dd><a name="index-mno_002dcond_002dmove"></a>
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<p>Disable the use of conditional-move instructions.
|
</p>
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<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
|
</dd>
|
<dt><code>-mscc</code></dt>
|
<dd><a name="index-mscc"></a>
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<p>Enable the use of conditional set instructions (default).
|
</p>
|
<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
|
</dd>
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<dt><code>-mno-scc</code></dt>
|
<dd><a name="index-mno_002dscc"></a>
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|
<p>Disable the use of conditional set instructions.
|
</p>
|
<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
|
</dd>
|
<dt><code>-mcond-exec</code></dt>
|
<dd><a name="index-mcond_002dexec"></a>
|
|
<p>Enable the use of conditional execution (default).
|
</p>
|
<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
|
</dd>
|
<dt><code>-mno-cond-exec</code></dt>
|
<dd><a name="index-mno_002dcond_002dexec-1"></a>
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|
<p>Disable the use of conditional execution.
|
</p>
|
<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
|
</dd>
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<dt><code>-mvliw-branch</code></dt>
|
<dd><a name="index-mvliw_002dbranch"></a>
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<p>Run a pass to pack branches into VLIW instructions (default).
|
</p>
|
<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
|
</dd>
|
<dt><code>-mno-vliw-branch</code></dt>
|
<dd><a name="index-mno_002dvliw_002dbranch"></a>
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<p>Do not run a pass to pack branches into VLIW instructions.
|
</p>
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<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
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</dd>
|
<dt><code>-mmulti-cond-exec</code></dt>
|
<dd><a name="index-mmulti_002dcond_002dexec"></a>
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<p>Enable optimization of <code>&&</code> and <code>||</code> in conditional execution
|
(default).
|
</p>
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<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
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</dd>
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<dt><code>-mno-multi-cond-exec</code></dt>
|
<dd><a name="index-mno_002dmulti_002dcond_002dexec"></a>
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<p>Disable optimization of <code>&&</code> and <code>||</code> in conditional execution.
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</p>
|
<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
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</dd>
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<dt><code>-mnested-cond-exec</code></dt>
|
<dd><a name="index-mnested_002dcond_002dexec"></a>
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<p>Enable nested conditional execution optimizations (default).
|
</p>
|
<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
|
</dd>
|
<dt><code>-mno-nested-cond-exec</code></dt>
|
<dd><a name="index-mno_002dnested_002dcond_002dexec"></a>
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|
<p>Disable nested conditional execution optimizations.
|
</p>
|
<p>This switch is mainly for debugging the compiler and will likely be removed
|
in a future version.
|
</p>
|
</dd>
|
<dt><code>-moptimize-membar</code></dt>
|
<dd><a name="index-moptimize_002dmembar"></a>
|
|
<p>This switch removes redundant <code>membar</code> instructions from the
|
compiler-generated code. It is enabled by default.
|
</p>
|
</dd>
|
<dt><code>-mno-optimize-membar</code></dt>
|
<dd><a name="index-mno_002doptimize_002dmembar"></a>
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|
<p>This switch disables the automatic removal of redundant <code>membar</code>
|
instructions from the generated code.
|
</p>
|
</dd>
|
<dt><code>-mtomcat-stats</code></dt>
|
<dd><a name="index-mtomcat_002dstats"></a>
|
|
<p>Cause gas to print out tomcat statistics.
|
</p>
|
</dd>
|
<dt><code>-mcpu=<var>cpu</var></code></dt>
|
<dd><a name="index-mcpu-5"></a>
|
|
<p>Select the processor type for which to generate code. Possible values are
|
‘<samp>frv</samp>’, ‘<samp>fr550</samp>’, ‘<samp>tomcat</samp>’, ‘<samp>fr500</samp>’, ‘<samp>fr450</samp>’,
|
‘<samp>fr405</samp>’, ‘<samp>fr400</samp>’, ‘<samp>fr300</samp>’ and ‘<samp>simple</samp>’.
|
</p>
|
</dd>
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</dl>
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<p>
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Next: <a href="GNU_002fLinux-Options.html#GNU_002fLinux-Options" accesskey="n" rel="next">GNU/Linux Options</a>, Previous: <a href="FT32-Options.html#FT32-Options" accesskey="p" rel="prev">FT32 Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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