/*************************************************************************/ /*!
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@File rgxpdvfs.c
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@Title RGX Proactive DVFS Functionality
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@Codingstyle IMG
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@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
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@Description Kernel mode Proactive DVFS Functionality.
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@License Dual MIT/GPLv2
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The contents of this file are subject to the MIT license as set out below.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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Alternatively, the contents of this file may be used under the terms of
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the GNU General Public License Version 2 ("GPL") in which case the provisions
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of GPL are applicable instead of those above.
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If you wish to allow use of your version of this file only under the terms of
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GPL, and not to allow others to use your version of this file under the terms
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of the MIT license, indicate your decision by deleting the provisions above
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and replace them with the notice and other provisions required by GPL as set
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out in the file called "GPL-COPYING" included in this distribution. If you do
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not delete the provisions above, a recipient may use your version of this file
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under the terms of either the MIT license or GPL.
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This License is also included in this distribution in the file called
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"MIT-COPYING".
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EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
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PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/ /**************************************************************************/
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#include "rgxpdvfs.h"
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#include "rgxfwutils.h"
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#define USEC_TO_MSEC 1000
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PVRSRV_ERROR PDVFSLimitMaxFrequency(PVRSRV_RGXDEV_INFO *psDevInfo, IMG_UINT32 ui32MaxOPPPoint)
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{
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RGXFWIF_KCCB_CMD sGPCCBCmd;
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PVRSRV_ERROR eError;
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if(psDevInfo->bPDVFSEnabled != IMG_TRUE)
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{
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/* No error message to avoid excessive messages */
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return PVRSRV_OK;
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}
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/* send feedback */
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sGPCCBCmd.eCmdType = RGXFWIF_KCCB_CMD_PDVFS_LIMIT_MAX_FREQ;
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sGPCCBCmd.uCmdData.sPDVFSMaxFreqData.ui32MaxOPPPoint = ui32MaxOPPPoint;
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/* Submit command to the firmware. */
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LOOP_UNTIL_TIMEOUT(MAX_HW_TIME_US)
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{
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eError = RGXScheduleCommand(psDevInfo,
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RGXFWIF_DM_GP,
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&sGPCCBCmd,
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sizeof(sGPCCBCmd),
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0,
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PDUMP_FLAGS_CONTINUOUS);
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if (eError != PVRSRV_ERROR_RETRY)
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{
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break;
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}
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OSWaitus(MAX_HW_TIME_US/WAIT_TRY_COUNT);
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} END_LOOP_UNTIL_TIMEOUT();
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return PVRSRV_OK;
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}
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void PDVFSRequestReactiveUpdate(PVRSRV_RGXDEV_INFO *psDevInfo)
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{
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RGXFWIF_KCCB_CMD sGPCCBCmd;
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PVRSRV_ERROR eError;
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if(psDevInfo->bPDVFSEnabled != IMG_TRUE)
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{
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/* No error message to avoid excessive messages */
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return;
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}
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if(psDevInfo->psDeviceNode->psDevConfig->sDVFS.sPDVFSData.bWorkInFrame == IMG_FALSE)
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{
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return;
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}
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sGPCCBCmd.eCmdType = RGXFWIF_KCCB_CMD_PDVFS_REQUEST_REACTIVE_UPDATE;
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/* Submit command to the firmware. */
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LOOP_UNTIL_TIMEOUT(MAX_HW_TIME_US)
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{
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eError = RGXScheduleCommand(psDevInfo,
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RGXFWIF_DM_GP,
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&sGPCCBCmd,
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sizeof(sGPCCBCmd),
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0,
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PDUMP_FLAGS_CONTINUOUS);
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if (eError != PVRSRV_ERROR_RETRY)
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{
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break;
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}
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OSWaitus(MAX_HW_TIME_US/WAIT_TRY_COUNT);
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} END_LOOP_UNTIL_TIMEOUT();
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psDevInfo->psDeviceNode->psDevConfig->sDVFS.sPDVFSData.bWorkInFrame = IMG_FALSE;
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}
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/*************************************************************************/ /*!
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@Function PDVFSProcessCoreClkRateChange
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@Description Processes the core clock rate change request or notification.
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Processes as notification, if SUPPORT_PDVFS_GPIO feature is enabled
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i.e. firmware (PDVFS) can use GPIO to change core clock rate
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else processes as request (uses system layer API to change core
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clock rate)
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@Input psDevInfo A pointer to PVRSRV_RGXDEV_INFO.
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@Input ui32CoreClockRate New core clock rate.
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@Return PVRSRV_ERROR.
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*/ /**************************************************************************/
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PVRSRV_ERROR PDVFSProcessCoreClkRateChange(PVRSRV_RGXDEV_INFO *psDevInfo, IMG_UINT32 ui32CoreClockRate)
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{
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PVRSRV_DEVICE_CONFIG *psDevConfig = psDevInfo->psDeviceNode->psDevConfig;
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IMG_DVFS_DEVICE_CFG *psDVFSDeviceCfg = &psDevConfig->sDVFS.sDVFSDeviceCfg;
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RGX_TIMING_INFORMATION *psRGXTimingInfo = ((RGX_DATA*)(psDevConfig->hDevData))->psRGXTimingInfo;
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PVRSRV_ERROR eError;
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#if !defined (SUPPORT_PDVFS_GPIO)
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IMG_UINT32 ui32CoreClockRateCurrent = psRGXTimingInfo->ui32CoreClockSpeed;
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#endif
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IMG_UINT32 ui32Index;
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const IMG_OPP *psOpp = NULL;
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if(psDevInfo->bPDVFSEnabled != IMG_TRUE)
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{
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/* No error message to avoid excessive messages */
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return PVRSRV_OK;
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}
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PVR_DPF((PVR_DBG_MESSAGE,"Core clock rate = %u\n", ui32CoreClockRate));
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/**
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* Find the matching OPP (Exact).
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*/
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for (ui32Index = 0; ui32Index < psDVFSDeviceCfg->ui32OPPTableSize; ui32Index++)
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{
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if (ui32CoreClockRate == psDVFSDeviceCfg->pasOPPTable[ui32Index].ui32Freq)
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{
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psOpp = &psDVFSDeviceCfg->pasOPPTable[ui32Index];
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break;
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}
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}
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if (!psOpp)
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{
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PVR_DPF((PVR_DBG_ERROR, "Frequency not present in OPP table - %u", ui32CoreClockRate));
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return PVRSRV_ERROR_INVALID_PARAMS;
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}
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eError = PVRSRVDevicePreClockSpeedChange(psDevInfo->psDeviceNode, psDVFSDeviceCfg->bIdleReq, NULL);
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if (eError != PVRSRV_OK)
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{
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PVR_DPF((PVR_DBG_ERROR, "PVRSRVDevicePreClockSpeedChange failed"));
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return eError;
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}
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#if !defined (SUPPORT_PDVFS_GPIO)
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/**
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* Increasing frequency, change voltage first
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*/
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if(ui32CoreClockRate > ui32CoreClockRateCurrent)
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{
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psDVFSDeviceCfg->pfnSetVoltage(psOpp->ui32Volt);
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}
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psDVFSDeviceCfg->pfnSetFrequency(ui32CoreClockRate);
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/**
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* Decreasing frequency, change frequency first
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*/
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if (ui32CoreClockRate < ui32CoreClockRateCurrent)
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{
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psDVFSDeviceCfg->pfnSetVoltage(psOpp->ui32Volt);
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}
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#endif
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psRGXTimingInfo->ui32CoreClockSpeed = ui32CoreClockRate;
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PVRSRVDevicePostClockSpeedChange(psDevInfo->psDeviceNode, psDVFSDeviceCfg->bIdleReq, NULL);
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return PVRSRV_OK;
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}
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#if defined (RGXFW_META_SUPPORT_2ND_THREAD)
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/*************************************************************************/ /*!
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@Function RGXPDVFSCheckCoreClkRateChange
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@Description Checks if core clock rate has changed since the last snap-shot.
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@Input psDevInfo A pointer to PVRSRV_RGXDEV_INFO.
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@Return None.
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*/ /**************************************************************************/
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void RGXPDVFSCheckCoreClkRateChange(PVRSRV_RGXDEV_INFO *psDevInfo)
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{
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IMG_UINT32 ui32CoreClkRate = *(psDevInfo->pui32RGXFWIFCoreClkRate);
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if(psDevInfo->bPDVFSEnabled != IMG_TRUE)
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{
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/* No error message to avoid excessive messages */
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return;
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}
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if ((ui32CoreClkRate != 0) &&
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(psDevInfo->ui32CoreClkRateSnapshot != ui32CoreClkRate))
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{
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psDevInfo->ui32CoreClkRateSnapshot = ui32CoreClkRate;
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PDVFSProcessCoreClkRateChange(psDevInfo, ui32CoreClkRate);
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}
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}
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#endif
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