/*************************************************************************/ /*!
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@File
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@Title RGX memory context management
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@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
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@Description RGX memory context management
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@License Dual MIT/GPLv2
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The contents of this file are subject to the MIT license as set out below.
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|
Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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|
The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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Alternatively, the contents of this file may be used under the terms of
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the GNU General Public License Version 2 ("GPL") in which case the provisions
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of GPL are applicable instead of those above.
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|
If you wish to allow use of your version of this file only under the terms of
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GPL, and not to allow others to use your version of this file under the terms
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of the MIT license, indicate your decision by deleting the provisions above
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and replace them with the notice and other provisions required by GPL as set
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out in the file called "GPL-COPYING" included in this distribution. If you do
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not delete the provisions above, a recipient may use your version of this file
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under the terms of either the MIT license or GPL.
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This License is also included in this distribution in the file called
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"MIT-COPYING".
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EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
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PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/ /**************************************************************************/
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#include "pvr_debug.h"
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#include "rgxmem.h"
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#include "allocmem.h"
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#include "devicemem.h"
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#include "devicemem_server_utils.h"
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#include "devicemem_pdump.h"
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#include "rgxdevice.h"
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#include "rgx_fwif_km.h"
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#include "rgxfwutils.h"
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#include "pdump_km.h"
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#include "pdump_physmem.h"
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#include "pvr_notifier.h"
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#include "pvrsrv.h"
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#include "sync_internal.h"
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#include "rgx_memallocflags.h"
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#include "rgx_bvnc_defs_km.h"
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/*
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FIXME:
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For now just get global state, but what we really want is to do
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this per memory context
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*/
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static IMG_UINT32 gui32CacheOpps = 0;
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/* FIXME: End */
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typedef struct _SERVER_MMU_CONTEXT_ {
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DEVMEM_MEMDESC *psFWMemContextMemDesc;
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MMU_CONTEXT *psMMUContext;
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IMG_PID uiPID;
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IMG_CHAR szProcessName[RGXMEM_SERVER_MMU_CONTEXT_MAX_NAME];
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DLLIST_NODE sNode;
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PVRSRV_RGXDEV_INFO *psDevInfo;
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} SERVER_MMU_CONTEXT;
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|
|
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void RGXMMUCacheInvalidate(PVRSRV_DEVICE_NODE *psDeviceNode,
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IMG_HANDLE hDeviceData,
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MMU_LEVEL eMMULevel,
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IMG_BOOL bUnmap)
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{
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PVRSRV_RGXDEV_INFO *psDevInfo = (PVRSRV_RGXDEV_INFO *)psDeviceNode->pvDevice;
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PVR_UNREFERENCED_PARAMETER(bUnmap);
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switch (eMMULevel)
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{
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case MMU_LEVEL_3: gui32CacheOpps |= RGXFWIF_MMUCACHEDATA_FLAGS_PC;
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break;
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case MMU_LEVEL_2: gui32CacheOpps |= RGXFWIF_MMUCACHEDATA_FLAGS_PD;
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break;
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case MMU_LEVEL_1: gui32CacheOpps |= RGXFWIF_MMUCACHEDATA_FLAGS_PT;
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if(!(psDevInfo->sDevFeatureCfg.ui64Features & RGX_FEATURE_SLC_VIVT_BIT_MASK))
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{
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gui32CacheOpps |= RGXFWIF_MMUCACHEDATA_FLAGS_TLB;
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}
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break;
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default:
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PVR_ASSERT(0);
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break;
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}
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}
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PVRSRV_ERROR RGXMMUCacheInvalidateKick(PVRSRV_DEVICE_NODE *psDevInfo,
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IMG_UINT32 *pui32MMUInvalidateUpdate,
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IMG_BOOL bInterrupt)
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{
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PVRSRV_ERROR eError;
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eError = RGXPreKickCacheCommand(psDevInfo->pvDevice,
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RGXFWIF_DM_GP,
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pui32MMUInvalidateUpdate,
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bInterrupt);
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return eError;
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}
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PVRSRV_ERROR RGXPreKickCacheCommand(PVRSRV_RGXDEV_INFO *psDevInfo,
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RGXFWIF_DM eDM,
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IMG_UINT32 *pui32MMUInvalidateUpdate,
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IMG_BOOL bInterrupt)
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{
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PVRSRV_DEVICE_NODE *psDeviceNode = psDevInfo->psDeviceNode;
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RGXFWIF_KCCB_CMD sFlushCmd;
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PVRSRV_ERROR eError = PVRSRV_OK;
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if (!gui32CacheOpps)
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{
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goto _PVRSRVPowerLock_Exit;
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}
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/* PVRSRVPowerLock guarantees atomicity between commands and global variables consistency.
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* This is helpful in a scenario with several applications allocating resources. */
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eError = PVRSRVPowerLock(psDeviceNode);
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if (eError != PVRSRV_OK)
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{
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PVR_DPF((PVR_DBG_WARNING, "RGXPreKickCacheCommand: failed to acquire powerlock (%s)",
|
PVRSRVGetErrorStringKM(eError)));
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goto _PVRSRVPowerLock_Exit;
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}
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*pui32MMUInvalidateUpdate = psDeviceNode->ui32NextMMUInvalidateUpdate;
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/* Setup cmd and add the device nodes sync object */
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sFlushCmd.eCmdType = RGXFWIF_KCCB_CMD_MMUCACHE;
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sFlushCmd.uCmdData.sMMUCacheData.ui32MMUCacheSyncUpdateValue = psDeviceNode->ui32NextMMUInvalidateUpdate;
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SyncPrimGetFirmwareAddr(psDeviceNode->psMMUCacheSyncPrim,
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&sFlushCmd.uCmdData.sMMUCacheData.sMMUCacheSync.ui32Addr);
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/* Set the update value for the next kick */
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psDeviceNode->ui32NextMMUInvalidateUpdate++;
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/* Set which memory context this command is for (all ctxs for now) */
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if(psDevInfo->sDevFeatureCfg.ui64Features & RGX_FEATURE_SLC_VIVT_BIT_MASK)
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{
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gui32CacheOpps |= RGXFWIF_MMUCACHEDATA_FLAGS_CTX_ALL;
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}
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/* Indicate the firmware should signal command completion to the host */
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if(bInterrupt)
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{
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gui32CacheOpps |= RGXFWIF_MMUCACHEDATA_FLAGS_INTERRUPT;
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}
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#if 0
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sFlushCmd.uCmdData.sMMUCacheData.psMemoryContext = ???
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#endif
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PDUMPPOWCMDSTART();
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eError = PVRSRVSetDevicePowerStateKM(psDeviceNode,
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PVRSRV_DEV_POWER_STATE_ON,
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IMG_FALSE);
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PDUMPPOWCMDEND();
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if (eError != PVRSRV_OK)
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{
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PVR_DPF((PVR_DBG_WARNING, "RGXPreKickCacheCommand: failed to transition RGX to ON (%s)",
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PVRSRVGetErrorStringKM(eError)));
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goto _PVRSRVSetDevicePowerStateKM_Exit;
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}
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sFlushCmd.uCmdData.sMMUCacheData.ui32Flags = gui32CacheOpps;
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#if defined(PDUMP)
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PDUMPCOMMENTWITHFLAGS(PDUMP_FLAGS_CONTINUOUS,
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"Submit MMU flush and invalidate (flags = 0x%08x)",
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gui32CacheOpps);
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#endif
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gui32CacheOpps = 0;
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/* Schedule MMU cache command */
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eError = RGXSendCommand(psDevInfo,
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eDM,
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&sFlushCmd,
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sizeof(RGXFWIF_KCCB_CMD),
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PDUMP_FLAGS_CONTINUOUS);
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if (eError != PVRSRV_OK)
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{
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PVR_DPF((PVR_DBG_ERROR,"RGXPreKickCacheCommand: Failed to schedule MMU "
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"cache command to DM=%d with error (%u)", eDM, eError));
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}
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_PVRSRVSetDevicePowerStateKM_Exit:
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PVRSRVPowerUnlock(psDeviceNode);
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_PVRSRVPowerLock_Exit:
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return eError;
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}
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#if defined(SUPPORT_PAGE_FAULT_DEBUG)
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/* page fault debug is the only current use case for needing to find process info
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* after that process device memory context has been destroyed
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*/
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typedef struct _UNREGISTERED_MEMORY_CONTEXT_
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{
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IMG_PID uiPID;
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IMG_CHAR szProcessName[RGXMEM_SERVER_MMU_CONTEXT_MAX_NAME];
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IMG_DEV_PHYADDR sPCDevPAddr;
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} UNREGISTERED_MEMORY_CONTEXT;
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/* must be a power of two */
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#define UNREGISTERED_MEMORY_CONTEXTS_HISTORY_SIZE (1 << 3)
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static UNREGISTERED_MEMORY_CONTEXT gasUnregisteredMemCtxs[UNREGISTERED_MEMORY_CONTEXTS_HISTORY_SIZE];
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static IMG_UINT32 gui32UnregisteredMemCtxsHead = 0;
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/* record a device memory context being unregistered.
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* the list of unregistered contexts can be used to find the PID and process name
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* belonging to a memory context which has been destroyed
|
*/
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static void _RecordUnregisteredMemoryContext(PVRSRV_RGXDEV_INFO *psDevInfo, SERVER_MMU_CONTEXT *psServerMMUContext)
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{
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UNREGISTERED_MEMORY_CONTEXT *psRecord;
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OSLockAcquire(psDevInfo->hMMUCtxUnregLock);
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psRecord = &gasUnregisteredMemCtxs[gui32UnregisteredMemCtxsHead];
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gui32UnregisteredMemCtxsHead = (gui32UnregisteredMemCtxsHead + 1)
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& (UNREGISTERED_MEMORY_CONTEXTS_HISTORY_SIZE - 1);
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OSLockRelease(psDevInfo->hMMUCtxUnregLock);
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psRecord->uiPID = psServerMMUContext->uiPID;
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if (MMU_AcquireBaseAddr(psServerMMUContext->psMMUContext, &psRecord->sPCDevPAddr) != PVRSRV_OK)
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{
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PVR_LOG(("_RecordUnregisteredMemoryContext: Failed to get PC address for memory context"));
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}
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OSStringNCopy(psRecord->szProcessName, psServerMMUContext->szProcessName, sizeof(psRecord->szProcessName));
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psRecord->szProcessName[sizeof(psRecord->szProcessName) - 1] = '\0';
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}
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#endif
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void RGXUnregisterMemoryContext(IMG_HANDLE hPrivData)
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{
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SERVER_MMU_CONTEXT *psServerMMUContext = hPrivData;
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PVRSRV_RGXDEV_INFO *psDevInfo = psServerMMUContext->psDevInfo;
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OSWRLockAcquireWrite(psDevInfo->hMemoryCtxListLock);
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dllist_remove_node(&psServerMMUContext->sNode);
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OSWRLockReleaseWrite(psDevInfo->hMemoryCtxListLock);
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#if defined(SUPPORT_PAGE_FAULT_DEBUG)
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_RecordUnregisteredMemoryContext(psDevInfo, psServerMMUContext);
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#endif
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/*
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* Release the page catalogue address acquired in RGXRegisterMemoryContext().
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*/
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MMU_ReleaseBaseAddr(NULL /* FIXME */);
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/*
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* Free the firmware memory context.
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*/
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DevmemFwFree(psDevInfo, psServerMMUContext->psFWMemContextMemDesc);
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OSFreeMem(psServerMMUContext);
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}
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/*
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* RGXRegisterMemoryContext
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*/
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PVRSRV_ERROR RGXRegisterMemoryContext(PVRSRV_DEVICE_NODE *psDeviceNode,
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MMU_CONTEXT *psMMUContext,
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IMG_HANDLE *hPrivData)
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{
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PVRSRV_ERROR eError;
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PVRSRV_RGXDEV_INFO *psDevInfo = psDeviceNode->pvDevice;
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DEVMEM_FLAGS_T uiFWMemContextMemAllocFlags;
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RGXFWIF_FWMEMCONTEXT *psFWMemContext;
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DEVMEM_MEMDESC *psFWMemContextMemDesc;
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SERVER_MMU_CONTEXT *psServerMMUContext;
|
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if (psDevInfo->psKernelMMUCtx == NULL)
|
{
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/*
|
* This must be the creation of the Kernel memory context. Take a copy
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* of the MMU context for use when programming the BIF.
|
*/
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psDevInfo->psKernelMMUCtx = psMMUContext;
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}
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else
|
{
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psServerMMUContext = OSAllocMem(sizeof(*psServerMMUContext));
|
if (psServerMMUContext == NULL)
|
{
|
eError = PVRSRV_ERROR_OUT_OF_MEMORY;
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goto fail_alloc_server_ctx;
|
}
|
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psServerMMUContext->psDevInfo = psDevInfo;
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/*
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* This FW MemContext is only mapped into kernel for initialisation purposes.
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* Otherwise this allocation is only used by the FW.
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* Therefore the GPU cache doesn't need coherency,
|
* and write-combine is suffice on the CPU side (WC buffer will be flushed at any kick)
|
*/
|
uiFWMemContextMemAllocFlags = PVRSRV_MEMALLOCFLAG_DEVICE_FLAG(PMMETA_PROTECT) |
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PVRSRV_MEMALLOCFLAG_DEVICE_FLAG(FIRMWARE_CACHED) |
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PVRSRV_MEMALLOCFLAG_GPU_READABLE |
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PVRSRV_MEMALLOCFLAG_GPU_WRITEABLE |
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PVRSRV_MEMALLOCFLAG_GPU_CACHE_INCOHERENT |
|
PVRSRV_MEMALLOCFLAG_CPU_READABLE |
|
PVRSRV_MEMALLOCFLAG_CPU_WRITEABLE |
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PVRSRV_MEMALLOCFLAG_CPU_WRITE_COMBINE |
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PVRSRV_MEMALLOCFLAG_KERNEL_CPU_MAPPABLE;
|
|
/*
|
Allocate device memory for the firmware memory context for the new
|
application.
|
*/
|
PDUMPCOMMENT("Allocate RGX firmware memory context");
|
/* FIXME: why cache-consistent? */
|
eError = DevmemFwAllocate(psDevInfo,
|
sizeof(*psFWMemContext),
|
uiFWMemContextMemAllocFlags,
|
"FwMemoryContext",
|
&psFWMemContextMemDesc);
|
|
if (eError != PVRSRV_OK)
|
{
|
PVR_DPF((PVR_DBG_ERROR,"RGXRegisterMemoryContext: Failed to allocate firmware memory context (%u)",
|
eError));
|
goto fail_alloc_fw_ctx;
|
}
|
|
/*
|
Temporarily map the firmware memory context to the kernel.
|
*/
|
eError = DevmemAcquireCpuVirtAddr(psFWMemContextMemDesc,
|
(void **)&psFWMemContext);
|
if (eError != PVRSRV_OK)
|
{
|
PVR_DPF((PVR_DBG_ERROR,"RGXRegisterMemoryContext: Failed to map firmware memory context (%u)",
|
eError));
|
goto fail_acquire_cpu_addr;
|
}
|
|
/*
|
* Write the new memory context's page catalogue into the firmware memory
|
* context for the client.
|
*/
|
eError = MMU_AcquireBaseAddr(psMMUContext, &psFWMemContext->sPCDevPAddr);
|
if (eError != PVRSRV_OK)
|
{
|
PVR_DPF((PVR_DBG_ERROR,"RGXRegisterMemoryContext: Failed to acquire Page Catalogue address (%u)",
|
eError));
|
DevmemReleaseCpuVirtAddr(psFWMemContextMemDesc);
|
goto fail_acquire_base_addr;
|
}
|
|
/*
|
* Set default values for the rest of the structure.
|
*/
|
psFWMemContext->uiPageCatBaseRegID = -1;
|
psFWMemContext->uiBreakpointAddr = 0;
|
psFWMemContext->uiBPHandlerAddr = 0;
|
psFWMemContext->uiBreakpointCtl = 0;
|
|
#if defined(SUPPORT_GPUVIRT_VALIDATION)
|
{
|
IMG_UINT32 ui32OSid = 0, ui32OSidReg = 0;
|
IMG_BOOL bOSidAxiProt;
|
|
MMU_GetOSids(psMMUContext, &ui32OSid, &ui32OSidReg, &bOSidAxiProt);
|
|
psFWMemContext->ui32OSid = ui32OSidReg;
|
psFWMemContext->bOSidAxiProt = bOSidAxiProt;
|
}
|
#endif
|
|
#if defined(PDUMP)
|
{
|
IMG_CHAR aszName[PHYSMEM_PDUMP_MEMSPNAME_SYMB_ADDR_MAX_LENGTH];
|
IMG_DEVMEM_OFFSET_T uiOffset = 0;
|
|
/*
|
* Dump the Mem context allocation
|
*/
|
DevmemPDumpLoadMem(psFWMemContextMemDesc, 0, sizeof(*psFWMemContext), PDUMP_FLAGS_CONTINUOUS);
|
|
|
/*
|
* Obtain a symbolic addr of the mem context structure
|
*/
|
eError = DevmemPDumpPageCatBaseToSAddr(psFWMemContextMemDesc,
|
&uiOffset,
|
aszName,
|
PHYSMEM_PDUMP_MEMSPNAME_SYMB_ADDR_MAX_LENGTH);
|
|
if (eError != PVRSRV_OK)
|
{
|
PVR_DPF((PVR_DBG_ERROR,"RGXRegisterMemoryContext: Failed to generate a Dump Page Catalogue address (%u)",
|
eError));
|
DevmemReleaseCpuVirtAddr(psFWMemContextMemDesc);
|
goto fail_pdump_cat_base_addr;
|
}
|
|
/*
|
* Dump the Page Cat tag in the mem context (symbolic address)
|
*/
|
eError = MMU_PDumpWritePageCatBase(psMMUContext,
|
aszName,
|
uiOffset,
|
8, /* 64-bit register write */
|
0,
|
0,
|
0);
|
if (eError != PVRSRV_OK)
|
{
|
PVR_DPF((PVR_DBG_ERROR,"RGXRegisterMemoryContext: Failed to acquire Page Catalogue address (%u)",
|
eError));
|
DevmemReleaseCpuVirtAddr(psFWMemContextMemDesc);
|
goto fail_pdump_cat_base;
|
}
|
}
|
#endif
|
|
/*
|
* Release kernel address acquired above.
|
*/
|
DevmemReleaseCpuVirtAddr(psFWMemContextMemDesc);
|
|
/*
|
* Store the process information for this device memory context
|
* for use with the host page-fault analysis.
|
*/
|
psServerMMUContext->uiPID = OSGetCurrentClientProcessIDKM();
|
psServerMMUContext->psMMUContext = psMMUContext;
|
psServerMMUContext->psFWMemContextMemDesc = psFWMemContextMemDesc;
|
if (OSSNPrintf(psServerMMUContext->szProcessName,
|
RGXMEM_SERVER_MMU_CONTEXT_MAX_NAME,
|
"%s",
|
OSGetCurrentClientProcessNameKM()) == RGXMEM_SERVER_MMU_CONTEXT_MAX_NAME)
|
{
|
psServerMMUContext->szProcessName[RGXMEM_SERVER_MMU_CONTEXT_MAX_NAME-1] = '\0';
|
}
|
|
PDUMPCOMMENTWITHFLAGS(PDUMP_FLAGS_CONTINUOUS, "New memory context: Process Name: %s PID: %u (0x%08X)",
|
psServerMMUContext->szProcessName,
|
psServerMMUContext->uiPID,
|
psServerMMUContext->uiPID);
|
|
OSWRLockAcquireWrite(psDevInfo->hMemoryCtxListLock);
|
dllist_add_to_tail(&psDevInfo->sMemoryContextList, &psServerMMUContext->sNode);
|
OSWRLockReleaseWrite(psDevInfo->hMemoryCtxListLock);
|
|
MMU_SetDeviceData(psMMUContext, psFWMemContextMemDesc);
|
*hPrivData = psServerMMUContext;
|
}
|
|
return PVRSRV_OK;
|
|
#if defined(PDUMP)
|
fail_pdump_cat_base:
|
fail_pdump_cat_base_addr:
|
MMU_ReleaseBaseAddr(NULL);
|
#endif
|
fail_acquire_base_addr:
|
/* Done before jumping to the fail point as the release is done before exit */
|
fail_acquire_cpu_addr:
|
DevmemFwFree(psDevInfo, psServerMMUContext->psFWMemContextMemDesc);
|
fail_alloc_fw_ctx:
|
OSFreeMem(psServerMMUContext);
|
fail_alloc_server_ctx:
|
PVR_ASSERT(eError != PVRSRV_OK);
|
return eError;
|
}
|
|
DEVMEM_MEMDESC *RGXGetFWMemDescFromMemoryContextHandle(IMG_HANDLE hPriv)
|
{
|
SERVER_MMU_CONTEXT *psMMUContext = (SERVER_MMU_CONTEXT *) hPriv;
|
|
return psMMUContext->psFWMemContextMemDesc;
|
}
|
|
void RGXCheckFaultAddress(PVRSRV_RGXDEV_INFO *psDevInfo,
|
IMG_DEV_VIRTADDR *psDevVAddr,
|
IMG_DEV_PHYADDR *psDevPAddr,
|
DUMPDEBUG_PRINTF_FUNC *pfnDumpDebugPrintf,
|
void *pvDumpDebugFile)
|
{
|
IMG_DEV_PHYADDR sPCDevPAddr;
|
DLLIST_NODE *psNode, *psNext;
|
|
OSWRLockAcquireRead(psDevInfo->hMemoryCtxListLock);
|
|
dllist_foreach_node(&psDevInfo->sMemoryContextList, psNode, psNext)
|
{
|
SERVER_MMU_CONTEXT *psServerMMUContext =
|
IMG_CONTAINER_OF(psNode, SERVER_MMU_CONTEXT, sNode);
|
|
if (MMU_AcquireBaseAddr(psServerMMUContext->psMMUContext, &sPCDevPAddr) != PVRSRV_OK)
|
{
|
PVR_LOG(("Failed to get PC address for memory context"));
|
continue;
|
}
|
|
if (psDevPAddr->uiAddr == sPCDevPAddr.uiAddr)
|
{
|
PVR_DUMPDEBUG_LOG("Found memory context (PID = %d, %s)",
|
psServerMMUContext->uiPID,
|
psServerMMUContext->szProcessName);
|
|
MMU_CheckFaultAddress(psServerMMUContext->psMMUContext, psDevVAddr,
|
pfnDumpDebugPrintf, pvDumpDebugFile);
|
break;
|
}
|
}
|
|
/* Lastly check for fault in the kernel allocated memory */
|
if (MMU_AcquireBaseAddr(psDevInfo->psKernelMMUCtx, &sPCDevPAddr) != PVRSRV_OK)
|
{
|
PVR_LOG(("Failed to get PC address for kernel memory context"));
|
}
|
|
if (psDevPAddr->uiAddr == sPCDevPAddr.uiAddr)
|
{
|
MMU_CheckFaultAddress(psDevInfo->psKernelMMUCtx, psDevVAddr,
|
pfnDumpDebugPrintf, pvDumpDebugFile);
|
}
|
|
OSWRLockReleaseRead(psDevInfo->hMemoryCtxListLock);
|
}
|
|
/* given the physical address of a page catalogue, searches for a corresponding
|
* MMU context and if found, provides the caller details of the process.
|
* Returns IMG_TRUE if a process is found.
|
*/
|
IMG_BOOL RGXPCAddrToProcessInfo(PVRSRV_RGXDEV_INFO *psDevInfo, IMG_DEV_PHYADDR sPCAddress,
|
RGXMEM_PROCESS_INFO *psInfo)
|
{
|
IMG_BOOL bRet = IMG_FALSE;
|
DLLIST_NODE *psNode, *psNext;
|
SERVER_MMU_CONTEXT *psServerMMUContext = NULL;
|
|
/* check if the input PC addr corresponds to an active memory context */
|
dllist_foreach_node(&psDevInfo->sMemoryContextList, psNode, psNext)
|
{
|
SERVER_MMU_CONTEXT *psThisMMUContext =
|
IMG_CONTAINER_OF(psNode, SERVER_MMU_CONTEXT, sNode);
|
IMG_DEV_PHYADDR sPCDevPAddr;
|
|
if (MMU_AcquireBaseAddr(psThisMMUContext->psMMUContext, &sPCDevPAddr) != PVRSRV_OK)
|
{
|
PVR_LOG(("Failed to get PC address for memory context"));
|
continue;
|
}
|
|
if (sPCAddress.uiAddr == sPCDevPAddr.uiAddr)
|
{
|
psServerMMUContext = psThisMMUContext;
|
break;
|
}
|
}
|
|
if(psServerMMUContext != NULL)
|
{
|
psInfo->uiPID = psServerMMUContext->uiPID;
|
OSStringNCopy(psInfo->szProcessName, psServerMMUContext->szProcessName, sizeof(psInfo->szProcessName));
|
psInfo->szProcessName[sizeof(psInfo->szProcessName) - 1] = '\0';
|
psInfo->bUnregistered = IMG_FALSE;
|
bRet = IMG_TRUE;
|
}
|
/* else check if the input PC addr corresponds to the firmware */
|
else
|
{
|
IMG_DEV_PHYADDR sKernelPCDevPAddr;
|
PVRSRV_ERROR eError;
|
|
eError = MMU_AcquireBaseAddr(psDevInfo->psKernelMMUCtx, &sKernelPCDevPAddr);
|
|
if(eError != PVRSRV_OK)
|
{
|
PVR_LOG(("Failed to get PC address for kernel memory context"));
|
}
|
else
|
{
|
if(sPCAddress.uiAddr == sKernelPCDevPAddr.uiAddr)
|
{
|
psInfo->uiPID = RGXMEM_SERVER_PID_FIRMWARE;
|
OSStringNCopy(psInfo->szProcessName, "Firmware", sizeof(psInfo->szProcessName));
|
psInfo->szProcessName[sizeof(psInfo->szProcessName) - 1] = '\0';
|
psInfo->bUnregistered = IMG_FALSE;
|
bRet = IMG_TRUE;
|
}
|
}
|
}
|
#if defined(SUPPORT_PAGE_FAULT_DEBUG)
|
if(bRet == IMG_FALSE)
|
{
|
/* no active memory context found with the given PC address.
|
* Check the list of most recently freed memory contexts.
|
*/
|
IMG_UINT32 i;
|
|
OSLockAcquire(psDevInfo->hMMUCtxUnregLock);
|
|
/* iterate through the list of unregistered memory contexts
|
* from newest (one before the head) to the oldest (the current head)
|
*/
|
i = gui32UnregisteredMemCtxsHead;
|
|
do
|
{
|
UNREGISTERED_MEMORY_CONTEXT *psRecord;
|
|
i ? i-- : (i = (UNREGISTERED_MEMORY_CONTEXTS_HISTORY_SIZE - 1));
|
|
psRecord = &gasUnregisteredMemCtxs[i];
|
|
if(psRecord->sPCDevPAddr.uiAddr == sPCAddress.uiAddr)
|
{
|
psInfo->uiPID = psRecord->uiPID;
|
OSStringNCopy(psInfo->szProcessName, psRecord->szProcessName, sizeof(psInfo->szProcessName)-1);
|
psInfo->szProcessName[sizeof(psInfo->szProcessName) - 1] = '\0';
|
psInfo->bUnregistered = IMG_TRUE;
|
bRet = IMG_TRUE;
|
break;
|
}
|
} while(i != gui32UnregisteredMemCtxsHead);
|
|
OSLockRelease(psDevInfo->hMMUCtxUnregLock);
|
|
}
|
#endif
|
return bRet;
|
}
|
|
IMG_BOOL RGXPCPIDToProcessInfo(PVRSRV_RGXDEV_INFO *psDevInfo, IMG_PID uiPID,
|
RGXMEM_PROCESS_INFO *psInfo)
|
{
|
IMG_BOOL bRet = IMG_FALSE;
|
DLLIST_NODE *psNode, *psNext;
|
SERVER_MMU_CONTEXT *psServerMMUContext = NULL;
|
|
/* check if the input PID corresponds to an active memory context */
|
dllist_foreach_node(&psDevInfo->sMemoryContextList, psNode, psNext)
|
{
|
SERVER_MMU_CONTEXT *psThisMMUContext =
|
IMG_CONTAINER_OF(psNode, SERVER_MMU_CONTEXT, sNode);
|
|
if (psThisMMUContext->uiPID == uiPID)
|
{
|
psServerMMUContext = psThisMMUContext;
|
break;
|
}
|
}
|
|
if(psServerMMUContext != NULL)
|
{
|
psInfo->uiPID = psServerMMUContext->uiPID;
|
OSStringNCopy(psInfo->szProcessName, psServerMMUContext->szProcessName, sizeof(psInfo->szProcessName));
|
psInfo->szProcessName[sizeof(psInfo->szProcessName) - 1] = '\0';
|
psInfo->bUnregistered = IMG_FALSE;
|
bRet = IMG_TRUE;
|
}
|
/* else check if the input PID corresponds to the firmware */
|
else if(uiPID == RGXMEM_SERVER_PID_FIRMWARE)
|
{
|
psInfo->uiPID = RGXMEM_SERVER_PID_FIRMWARE;
|
OSStringNCopy(psInfo->szProcessName, "Firmware", sizeof(psInfo->szProcessName));
|
psInfo->szProcessName[sizeof(psInfo->szProcessName) - 1] = '\0';
|
psInfo->bUnregistered = IMG_FALSE;
|
bRet = IMG_TRUE;
|
}
|
#if defined(SUPPORT_PAGE_FAULT_DEBUG)
|
/* if the PID didn't correspond to an active context or the
|
* FW address then see if it matches a recently unregistered context
|
*/
|
if(bRet == IMG_FALSE)
|
{
|
IMG_UINT32 i;
|
|
OSLockAcquire(psDevInfo->hMMUCtxUnregLock);
|
|
for(i = (gui32UnregisteredMemCtxsHead > 0) ? (gui32UnregisteredMemCtxsHead - 1) :
|
UNREGISTERED_MEMORY_CONTEXTS_HISTORY_SIZE;
|
i != gui32UnregisteredMemCtxsHead; i--)
|
{
|
UNREGISTERED_MEMORY_CONTEXT *psRecord = &gasUnregisteredMemCtxs[i];
|
|
if(psRecord->uiPID == uiPID)
|
{
|
psInfo->uiPID = psRecord->uiPID;
|
OSStringNCopy(psInfo->szProcessName, psRecord->szProcessName, sizeof(psInfo->szProcessName)-1);
|
psInfo->szProcessName[sizeof(psInfo->szProcessName) - 1] = '\0';
|
psInfo->bUnregistered = IMG_TRUE;
|
bRet = IMG_TRUE;
|
break;
|
}
|
}
|
|
OSLockRelease(psDevInfo->hMMUCtxUnregLock);
|
|
}
|
#endif
|
return bRet;
|
}
|
|
/******************************************************************************
|
End of file (rgxmem.c)
|
******************************************************************************/
|
