/*************************************************************************/ /*!
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@File rgx_fwif_hwperf.h
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@Title RGX HWPerf support
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@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
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@Description Shared header between RGX firmware and Init process
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@License Dual MIT/GPLv2
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The contents of this file are subject to the MIT license as set out below.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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Alternatively, the contents of this file may be used under the terms of
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the GNU General Public License Version 2 ("GPL") in which case the provisions
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of GPL are applicable instead of those above.
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If you wish to allow use of your version of this file only under the terms of
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GPL, and not to allow others to use your version of this file under the terms
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of the MIT license, indicate your decision by deleting the provisions above
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and replace them with the notice and other provisions required by GPL as set
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out in the file called "GPL-COPYING" included in this distribution. If you do
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not delete the provisions above, a recipient may use your version of this file
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under the terms of either the MIT license or GPL.
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This License is also included in this distribution in the file called
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"MIT-COPYING".
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EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
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PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/ /**************************************************************************/
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#ifndef RGX_FWIF_HWPERF_H
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#define RGX_FWIF_HWPERF_H
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#include "rgx_fwif_shared.h"
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#include "rgx_hwperf_km.h"
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#include "rgxdefs_km.h"
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/*****************************************************************************/
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/* Structure to hold a block's parameters for passing between the BG context
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* and the IRQ context when applying a configuration request. */
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typedef struct _RGXFWIF_HWPERF_CTL_BLK_
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{
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IMG_BOOL bValid;
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IMG_BOOL bEnabled;
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IMG_UINT32 eBlockID;
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IMG_UINT32 uiCounterMask;
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IMG_UINT64 RGXFW_ALIGN aui64CounterCfg[RGX_CNTBLK_COUNTERS_MAX];
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} RGXFWIF_HWPERF_CTL_BLK;
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/* Structure used to hold the configuration of the non-mux counters blocks */
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typedef struct _RGXFW_HWPERF_SELECT_
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{
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IMG_UINT32 ui32NumSelectedCounters;
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IMG_UINT32 aui32SelectedCountersIDs[RGX_HWPERF_MAX_CUSTOM_CNTRS];
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} RGXFW_HWPERF_SELECT;
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/* Structure to hold the whole configuration request details for all blocks
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* The block masks and counts are used to optimise reading of this data. */
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typedef struct _RGXFWIF_HWPERF_CTL_
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{
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IMG_BOOL bResetOrdinal;
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IMG_UINT32 ui32SelectedCountersBlockMask;
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RGXFW_HWPERF_SELECT RGXFW_ALIGN SelCntr[RGX_HWPERF_MAX_CUSTOM_BLKS];
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IMG_UINT32 ui32EnabledBlksCount;
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RGXFWIF_HWPERF_CTL_BLK RGXFW_ALIGN sBlkCfg[RGX_HWPERF_MAX_DEFINED_BLKS];
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} UNCACHED_ALIGN RGXFWIF_HWPERF_CTL;
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/* NOTE: The switch statement in this function must be kept in alignment with
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* the enumeration RGX_HWPERF_CNTBLK_ID defined in rgx_hwperf_km.h. ASSERTs may
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* result if not.
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* The function provides a hash lookup to get a handle on the global store for
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* a block's configuration store from it's block ID.
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*/
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#ifdef INLINE_IS_PRAGMA
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#pragma inline(rgxfw_hwperf_get_block_ctl)
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#endif
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static INLINE RGXFWIF_HWPERF_CTL_BLK* rgxfw_hwperf_get_block_ctl(
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RGX_HWPERF_CNTBLK_ID eBlockID, RGXFWIF_HWPERF_CTL *psHWPerfInitData)
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{
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IMG_INT32 i32Idx = -1;
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/* Hash the block ID into a control configuration array index */
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switch(eBlockID)
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{
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case RGX_CNTBLK_ID_TA:
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case RGX_CNTBLK_ID_RASTER:
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case RGX_CNTBLK_ID_HUB:
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case RGX_CNTBLK_ID_TORNADO:
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case RGX_CNTBLK_ID_JONES:
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case RGX_CNTBLK_ID_BF:
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case RGX_CNTBLK_ID_BT:
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case RGX_CNTBLK_ID_RT:
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case RGX_CNTBLK_ID_SH:
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{
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i32Idx = eBlockID;
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break;
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}
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case RGX_CNTBLK_ID_TPU_MCU0:
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case RGX_CNTBLK_ID_TPU_MCU1:
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case RGX_CNTBLK_ID_TPU_MCU2:
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case RGX_CNTBLK_ID_TPU_MCU3:
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case RGX_CNTBLK_ID_TPU_MCU4:
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case RGX_CNTBLK_ID_TPU_MCU5:
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case RGX_CNTBLK_ID_TPU_MCU6:
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case RGX_CNTBLK_ID_TPU_MCU7:
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{
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i32Idx = RGX_CNTBLK_ID_DIRECT_LAST +
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(eBlockID & RGX_CNTBLK_ID_UNIT_MASK);
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break;
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}
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case RGX_CNTBLK_ID_USC0:
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case RGX_CNTBLK_ID_USC1:
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case RGX_CNTBLK_ID_USC2:
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case RGX_CNTBLK_ID_USC3:
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case RGX_CNTBLK_ID_USC4:
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case RGX_CNTBLK_ID_USC5:
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case RGX_CNTBLK_ID_USC6:
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case RGX_CNTBLK_ID_USC7:
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case RGX_CNTBLK_ID_USC8:
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case RGX_CNTBLK_ID_USC9:
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case RGX_CNTBLK_ID_USC10:
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case RGX_CNTBLK_ID_USC11:
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case RGX_CNTBLK_ID_USC12:
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case RGX_CNTBLK_ID_USC13:
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case RGX_CNTBLK_ID_USC14:
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case RGX_CNTBLK_ID_USC15:
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{
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i32Idx = RGX_CNTBLK_ID_DIRECT_LAST +
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RGX_CNTBLK_INDIRECT_COUNT(TPU_MCU, 7) +
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(eBlockID & RGX_CNTBLK_ID_UNIT_MASK);
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break;
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}
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case RGX_CNTBLK_ID_TEXAS0:
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case RGX_CNTBLK_ID_TEXAS1:
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case RGX_CNTBLK_ID_TEXAS2:
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case RGX_CNTBLK_ID_TEXAS3:
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case RGX_CNTBLK_ID_TEXAS4:
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case RGX_CNTBLK_ID_TEXAS5:
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case RGX_CNTBLK_ID_TEXAS6:
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case RGX_CNTBLK_ID_TEXAS7:
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{
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i32Idx = RGX_CNTBLK_ID_DIRECT_LAST +
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RGX_CNTBLK_INDIRECT_COUNT(TPU_MCU, 7) +
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RGX_CNTBLK_INDIRECT_COUNT(USC, 15) +
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(eBlockID & RGX_CNTBLK_ID_UNIT_MASK);
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break;
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}
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case RGX_CNTBLK_ID_RASTER0:
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case RGX_CNTBLK_ID_RASTER1:
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case RGX_CNTBLK_ID_RASTER2:
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case RGX_CNTBLK_ID_RASTER3:
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{
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i32Idx = RGX_CNTBLK_ID_DIRECT_LAST +
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RGX_CNTBLK_INDIRECT_COUNT(TPU_MCU, 7) +
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RGX_CNTBLK_INDIRECT_COUNT(USC, 15) +
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RGX_CNTBLK_INDIRECT_COUNT(TEXAS, 7) +
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(eBlockID & RGX_CNTBLK_ID_UNIT_MASK);
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break;
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}
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case RGX_CNTBLK_ID_BLACKPEARL0:
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case RGX_CNTBLK_ID_BLACKPEARL1:
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case RGX_CNTBLK_ID_BLACKPEARL2:
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case RGX_CNTBLK_ID_BLACKPEARL3:
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{
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i32Idx = RGX_CNTBLK_ID_DIRECT_LAST +
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RGX_CNTBLK_INDIRECT_COUNT(TPU_MCU, 7) +
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RGX_CNTBLK_INDIRECT_COUNT(USC, 15) +
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RGX_CNTBLK_INDIRECT_COUNT(TEXAS, 7) +
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RGX_CNTBLK_INDIRECT_COUNT(RASTER, 3) +
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(eBlockID & RGX_CNTBLK_ID_UNIT_MASK);
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break;
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}
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case RGX_CNTBLK_ID_PBE0:
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case RGX_CNTBLK_ID_PBE1:
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case RGX_CNTBLK_ID_PBE2:
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case RGX_CNTBLK_ID_PBE3:
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case RGX_CNTBLK_ID_PBE4:
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case RGX_CNTBLK_ID_PBE5:
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case RGX_CNTBLK_ID_PBE6:
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case RGX_CNTBLK_ID_PBE7:
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case RGX_CNTBLK_ID_PBE8:
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case RGX_CNTBLK_ID_PBE9:
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case RGX_CNTBLK_ID_PBE10:
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case RGX_CNTBLK_ID_PBE11:
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case RGX_CNTBLK_ID_PBE12:
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case RGX_CNTBLK_ID_PBE13:
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case RGX_CNTBLK_ID_PBE14:
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case RGX_CNTBLK_ID_PBE15:
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{
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i32Idx = RGX_CNTBLK_ID_DIRECT_LAST +
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RGX_CNTBLK_INDIRECT_COUNT(TPU_MCU, 7) +
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RGX_CNTBLK_INDIRECT_COUNT(USC, 15) +
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RGX_CNTBLK_INDIRECT_COUNT(TEXAS, 7) +
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RGX_CNTBLK_INDIRECT_COUNT(RASTER, 3) +
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RGX_CNTBLK_INDIRECT_COUNT(BLACKPEARL, 3) +
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(eBlockID & RGX_CNTBLK_ID_UNIT_MASK);
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break;
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}
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case RGX_CNTBLK_ID_BX_TU0:
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case RGX_CNTBLK_ID_BX_TU1:
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case RGX_CNTBLK_ID_BX_TU2:
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case RGX_CNTBLK_ID_BX_TU3:
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{
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i32Idx = RGX_CNTBLK_ID_DIRECT_LAST +
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RGX_CNTBLK_INDIRECT_COUNT(TPU_MCU, 7) +
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RGX_CNTBLK_INDIRECT_COUNT(USC, 15) +
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RGX_CNTBLK_INDIRECT_COUNT(TEXAS, 7) +
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RGX_CNTBLK_INDIRECT_COUNT(RASTER, 3) +
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RGX_CNTBLK_INDIRECT_COUNT(BLACKPEARL, 3) +
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RGX_CNTBLK_INDIRECT_COUNT(PBE, 15) +
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(eBlockID & RGX_CNTBLK_ID_UNIT_MASK);
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break;
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}
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default:
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{
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return NULL;
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}
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}
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if ((i32Idx < 0) || (i32Idx >= RGX_HWPERF_MAX_DEFINED_BLKS))
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{
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return NULL;
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}
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return &psHWPerfInitData->sBlkCfg[i32Idx];
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}
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#endif
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