/*************************************************************************/ /*!
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@File
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@Title System Description Header
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@Copyright Copyright (c) Imagination Technologies Ltd. All Rights Reserved
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@Description This header provides system-specific declarations and macros
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@License Dual MIT/GPLv2
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The contents of this file are subject to the MIT license as set out below.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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Alternatively, the contents of this file may be used under the terms of
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the GNU General Public License Version 2 ("GPL") in which case the provisions
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of GPL are applicable instead of those above.
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If you wish to allow use of your version of this file only under the terms of
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GPL, and not to allow others to use your version of this file under the terms
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of the MIT license, indicate your decision by deleting the provisions above
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and replace them with the notice and other provisions required by GPL as set
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out in the file called "GPL-COPYING" included in this distribution. If you do
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not delete the provisions above, a recipient may use your version of this file
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under the terms of either the MIT license or GPL.
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This License is also included in this distribution in the file called
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"MIT-COPYING".
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EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
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PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/ /**************************************************************************/
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#if !defined(__APOLLO_REGS_H__)
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#define __APOLLO_REGS_H__
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/*
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* The core clock speed is passed through a multiplier depending on the TC version.
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*
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* On TC_ES1: Multiplier = x3, final speed = 270MHz
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* On TC_ES2: Multiplier = x6, final speed = 540MHz
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* On TCF5: Multiplier = 1x final speed = 45MHz
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*
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*
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* The base (unmultiplied speed) can be adjusted using a module parameter called "sys_core_clk_speed",
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* a number in Hz.
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*
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* As an example:
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*
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* PVR_SRVKM_PARAMS="sys_core_clk_speed=60000000" /etc/init.d/rc.pvr start
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*
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* would result in a core speed of 60MHz xMultiplier.
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*
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*
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* The memory clock is unmultiplied and can be adjusted using a module parameter called
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* "sys_mem_clk_speed", this should be the number in Hz for the memory clock speed.
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*
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* As an example:
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*
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* PVR_SRVKM_PARAMS="sys_mem_clk_speed=100000000" /etc/init.d/rc.pvr start
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*
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* would attempt to start the driver with the memory clock speed set to 100MHz.
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*
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*
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* Same applies to the system interface clock speed sys_sysif_clk_speed.
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* Needed for TCF5 but not for TC_ES2/ES1.
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* As an example:
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*
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* PVR_SRVKM_PARAMS="sys_mem_clk_speed=45000000" /etc/init.d/rc.pvr start
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*
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* would attempt to start the driver with the system clock speed set to 45MHz.
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*
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*
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* All parameters can be specified at once, eg:
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* PVR_SRVKM_PARAMS="sys_mem_clk_speed=MEMORY_SPEED sys_core_clk_speed=CORE_SPEED sys_mem_clk_speed=SYSIF_SPEED" /etc/init.d/rc.pvr start
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*/
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#define RGX_TC_SYS_CLOCK_SPEED (50000000) /*< At the moment just used for TCF5 */
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#if defined(TC_APOLLO_TCF5_12_4_1_48)
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/* TC TCF5 (12.*) */
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#undef RGX_TC_SYS_CLOCK_SPEED
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#define RGX_TC_CORE_CLOCK_SPEED (60000000)
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#define RGX_TC_MEM_CLOCK_SPEED (45000000)
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#define RGX_TC_SYS_CLOCK_SPEED (45000000)
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#elif defined(TC_APOLLO_TCF5_14_8_1_20) || defined(TC_APOLLO_TCF5_22_18_22_22) || \
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defined(TC_APOLLO_TCF5_22_34_22_23) || defined(TC_APOLLO_TCF5_22_44_22_25) || \
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defined(TC_APOLLO_TCF5_22_45_22_29) || defined(TC_APOLLO_TCF5_22_49_21_16) || \
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defined(TC_APOLLO_TCF5_22_50_22_29)
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/* TC TCF5 (14.* / 22.*) */
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#define RGX_TC_CORE_CLOCK_SPEED (20000000)
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#define RGX_TC_MEM_CLOCK_SPEED (50000000)
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#elif defined(TC_APOLLO_TCF5_22_19_54_24) || defined(TC_APOLLO_TCF5_22_30_54_25) || \
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defined(TC_APOLLO_TCF5_22_36_54_28) || defined(TC_APOLLO_TCF5_22_40_54_30) || \
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defined(TC_APOLLO_TCF5_22_48_54_30)
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/* TC TCF5 (22.*) */
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#define RGX_TC_CORE_CLOCK_SPEED (100000000)
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#define RGX_TC_MEM_CLOCK_SPEED (50000000)
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#elif defined(TC_APOLLO_TCF5_22_26_54_24)
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/* TC TCF5 (22.*) */
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#define RGX_TC_CORE_CLOCK_SPEED (13000000)
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#define RGX_TC_MEM_CLOCK_SPEED (50000000)
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#elif defined(TC_APOLLO_TCF5_22_32_54_328) || defined(TC_APOLLO_TCF5_22_46_54_330)
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/* TC TCF5 (22.*) */
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#define RGX_TC_CORE_CLOCK_SPEED (50000000)
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#define RGX_TC_MEM_CLOCK_SPEED (50000000)
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#elif defined(TC_APOLLO_TCF5_22_33_21_11)
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/* TC TCF5 (22.*) */
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#undef RGX_TC_SYS_CLOCK_SPEED
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#define RGX_TC_CORE_CLOCK_SPEED (20000000)
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#define RGX_TC_MEM_CLOCK_SPEED (45000000)
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#define RGX_TC_SYS_CLOCK_SPEED (45000000)
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#elif defined(TC_APOLLO_TCF5_22_41_54_330)
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/* TC TCF5 (22.*) */
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#define RGX_TC_CORE_CLOCK_SPEED (80000000)
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#define RGX_TC_MEM_CLOCK_SPEED (50000000)
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#elif defined(TC_APOLLO_TCF5_BVNC_NOT_SUPPORTED)
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/* TC TCF5 (22.*) fallback frequencies */
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#undef RGX_TC_SYS_CLOCK_SPEED
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#define RGX_TC_CORE_CLOCK_SPEED (20000000)
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#define RGX_TC_MEM_CLOCK_SPEED (50000000)
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#define RGX_TC_SYS_CLOCK_SPEED (50000000)
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#elif defined(TC_APOLLO_TCF5_REFERENCE)
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/* TC TCF5 (Reference bitfile) */
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#undef RGX_TC_SYS_CLOCK_SPEED
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#define RGX_TC_CORE_CLOCK_SPEED (50000000)
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#define RGX_TC_MEM_CLOCK_SPEED (50000000)
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#define RGX_TC_SYS_CLOCK_SPEED (45000000)
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#elif defined(TC_APOLLO_BONNIE)
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/* TC Bonnie */
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#define RGX_TC_CORE_CLOCK_SPEED (18000000)
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#define RGX_TC_MEM_CLOCK_SPEED (65000000)
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#elif defined(TC_APOLLO_ES2)
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/* TC ES2 */
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#define RGX_TC_CORE_CLOCK_SPEED (90000000)
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#define RGX_TC_MEM_CLOCK_SPEED (104000000)
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#else
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/* TC ES1 */
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#define RGX_TC_CORE_CLOCK_SPEED (90000000)
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#define RGX_TC_MEM_CLOCK_SPEED (65000000)
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#endif
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/* TC TCF5 */
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#define TC5_SYS_APOLLO_REG_PCI_BASENUM (1)
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#define TC5_SYS_APOLLO_REG_PDP2_OFFSET (0x800000)
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#define TC5_SYS_APOLLO_REG_PDP2_SIZE (0x7C4)
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#define TC5_SYS_APOLLO_REG_PDP2_FBDC_OFFSET (0xA00000)
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#define TC5_SYS_APOLLO_REG_PDP2_FBDC_SIZE (0x14)
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#define TC5_SYS_APOLLO_REG_HDMI_OFFSET (0xC00000)
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#define TC5_SYS_APOLLO_REG_HDMI_SIZE (0x1C)
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/* TC ES2 */
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#define TCF_TEMP_SENSOR_SPI_OFFSET 0xe
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#define TCF_TEMP_SENSOR_TO_C(raw) (((raw) * 248 / 4096) - 54)
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/* Number of bytes that are broken */
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#define SYS_DEV_MEM_BROKEN_BYTES (1024 * 1024)
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#define SYS_DEV_MEM_REGION_SIZE (0x40000000 - SYS_DEV_MEM_BROKEN_BYTES)
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/* Apollo reg on base register 0 */
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#define SYS_APOLLO_REG_PCI_BASENUM (0)
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#define SYS_APOLLO_REG_REGION_SIZE (0x00010000)
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#define SYS_APOLLO_REG_SYS_OFFSET (0x0000)
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#define SYS_APOLLO_REG_SYS_SIZE (0x0400)
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#define SYS_APOLLO_REG_PLL_OFFSET (0x1000)
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#define SYS_APOLLO_REG_PLL_SIZE (0x0400)
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#define SYS_APOLLO_REG_HOST_OFFSET (0x4050)
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#define SYS_APOLLO_REG_HOST_SIZE (0x0014)
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#define SYS_APOLLO_REG_PDP1_OFFSET (0xC000)
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#define SYS_APOLLO_REG_PDP1_SIZE (0x2000)
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/* Offsets for flashing Apollo PROMs from base 0 */
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#define APOLLO_FLASH_STAT_OFFSET (0x4058)
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#define APOLLO_FLASH_DATA_WRITE_OFFSET (0x4050)
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#define APOLLO_FLASH_RESET_OFFSET (0x4060)
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#define APOLLO_FLASH_FIFO_STATUS_MASK (0xF)
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#define APOLLO_FLASH_FIFO_STATUS_SHIFT (0)
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#define APOLLO_FLASH_PROGRAM_STATUS_MASK (0xF)
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#define APOLLO_FLASH_PROGRAM_STATUS_SHIFT (16)
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#define APOLLO_FLASH_PROG_COMPLETE_BIT (0x1)
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#define APOLLO_FLASH_PROG_PROGRESS_BIT (0x2)
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#define APOLLO_FLASH_PROG_FAILED_BIT (0x4)
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#define APOLLO_FLASH_INV_FILETYPE_BIT (0x8)
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#define APOLLO_FLASH_FIFO_SIZE (8)
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/* RGX reg on base register 1 */
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#define SYS_RGX_REG_PCI_BASENUM (1)
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#define SYS_RGX_REG_REGION_SIZE (0x7FFFF)
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/* Device memory (including HP mapping) on base register 2 */
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#define SYS_DEV_MEM_PCI_BASENUM (2)
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#endif /* if !defined(__APOLLO_REGS_H__) */
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