/*
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* Copyright 2020 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef __HAL_AV1D_GLOBAL_H__
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#define __HAL_AV1D_GLOBAL_H__
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#include "mpp_hal.h"
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#include "mpp_debug.h"
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#include "mpp_device.h"
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#include "hal_bufs.h"
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#include "dxva_syntax.h"
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#define AV1D_DBG_ERROR (0x00000001)
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#define AV1D_DBG_ASSERT (0x00000002)
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#define AV1D_DBG_WARNNING (0x00000004)
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#define AV1D_DBG_LOG (0x00000008)
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#define AV1D_DBG_HARD_MODE (0x00000010)
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extern RK_U32 hal_av1d_debug;
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#define AV1D_DBG(level, fmt, ...)\
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do {\
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if (level & hal_av1d_debug)\
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{ mpp_log(fmt, ## __VA_ARGS__); }\
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} while (0)
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#define AV1D_ERR(fmt, ...)\
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do {\
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if (AV1D_DBG_ERROR & hal_av1d_debug)\
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{ mpp_log(fmt, ## __VA_ARGS__); }\
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} while (0)
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#define ASSERT(val)\
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do {\
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if (AV1D_DBG_ASSERT & hal_av1d_debug)\
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{ mpp_assert(val); }\
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} while (0)
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#define AV1D_WARNNING(fmt, ...)\
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do {\
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if (AV1D_DBG_WARNNING & hal_av1d_debug)\
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{ mpp_log(fmt, ## __VA_ARGS__); }\
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} while (0)
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#define AV1D_LOG(fmt, ...)\
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do {\
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if (AV1D_DBG_LOG & hal_av1d_debug)\
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{ mpp_log(fmt, ## __VA_ARGS__); }\
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} while (0)
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//!< vaule check
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#define VAL_CHECK(ret, val, ...)\
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do{\
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if (!(val)){\
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ret = MPP_ERR_VALUE; \
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AV1D_WARNNING("value error(%d).\n", __LINE__); \
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goto __FAILED; \
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}} while (0)
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//!< memory malloc check
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#define MEM_CHECK(ret, val, ...)\
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do{\
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if (!(val)) {\
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ret = MPP_ERR_MALLOC; \
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AV1D_ERR("malloc buffer error(%d).\n", __LINE__); \
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ASSERT(0); goto __FAILED; \
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}} while (0)
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#define BUF_CHECK(ret, val, ...)\
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do{\
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if (val) {\
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ret = MPP_ERR_BUFFER_FULL; \
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AV1D_ERR("buffer get error(%d).\n", __LINE__); \
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ASSERT(0); goto __FAILED; \
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}} while (0)
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#define BUF_PUT(val, ...)\
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do{\
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if (val) {\
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if (mpp_buffer_put(val)) {\
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AV1D_ERR("buffer put error(%d).\n", __LINE__); \
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ASSERT(0); \
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}\
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}} while (0)
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//!< input check
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#define INP_CHECK(ret, val, ...)\
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do{\
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if ((val)) {\
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ret = MPP_ERR_INIT; \
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AV1D_WARNNING("input empty(%d).\n", __LINE__); \
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goto __RETURN; \
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}} while (0)
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//!< function return check
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#define FUN_CHECK(val)\
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do{\
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if ((val) < 0) {\
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AV1D_WARNNING("Function error(%d).\n", __LINE__); \
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goto __FAILED; \
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}} while (0)
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#define MAX_MB_SEGMENTS 8
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enum Av1SegLevelFeatures {
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SEG_AV1_LVL_ALT_Q, // Use alternate Quantizer ....
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SEG_AV1_LVL_ALT_LF_Y_V, // Use alternate loop filter value on y plane
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// vertical
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SEG_AV1_LVL_ALT_LF_Y_H, // Use alternate loop filter value on y plane
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// horizontal
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SEG_AV1_LVL_ALT_LF_U, // Use alternate loop filter value on u plane
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SEG_AV1_LVL_ALT_LF_V, // Use alternate loop filter value on v plane
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SEG_AV1_LVL_REF_FRAME, // Optional Segment reference frame
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SEG_AV1_LVL_SKIP, // Optional Segment (0,0) + skip mode
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SEG_AV1_LVL_GLOBALMV,
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SEG_AV1_LVL_MAX
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};
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#define AV1_ACTIVE_REFS 3
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#define AV1_ACTIVE_REFS_EX 7
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#define AV1_REF_LIST_SIZE 8
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#define AV1_REF_SCALE_SHIFT 14
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enum MvReferenceFrame {
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NONE = -1,
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INTRA_FRAME = 0,
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LAST_FRAME = 1,
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LAST2_FRAME_EX = 2,
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LAST3_FRAME_EX = 3,
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GOLDEN_FRAME_EX = 4,
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BWDREF_FRAME_EX = 5,
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ALTREF2_FRAME_EX = 6,
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ALTREF_FRAME_EX = 7,
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MAX_REF_FRAMES_EX = 8,
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GOLDEN_FRAME = 2,
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ALTREF_FRAME = 3,
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MAX_REF_FRAMES = 4
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};
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enum {
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AV1_FRAME_KEY = 0,
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AV1_FRAME_INTER = 1,
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AV1_FRAME_INTRA_ONLY = 2,
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AV1_FRAME_SWITCH = 3,
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};
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#define AV1DEC_MAX_PIC_BUFFERS 24
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#define AV1DEC_DYNAMIC_PIC_LIMIT 10
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#define ALLOWED_REFS_PER_FRAME_EX 7
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typedef struct FilmGrainMemory_t {
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RK_U8 scaling_lut_y[256];
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RK_U8 scaling_lut_cb[256];
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RK_U8 scaling_lut_cr[256];
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RK_S16 cropped_luma_grain_block[4096];
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RK_S16 cropped_chroma_grain_block[1024 * 2];
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} FilmGrainMemory;
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typedef struct av1d_hal_ctx_t {
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const MppHalApi *api;
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RK_U8 *bitstream;
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RK_U32 strm_len;
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HalDecTask *in_task;
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MppBufSlots slots;
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MppBufSlots packet_slots;
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MppDecCfgSet *cfg;
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MppBufferGroup buf_group;
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MppCbCtx *dec_cb;
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MppDev dev;
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void *reg_ctx;
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RK_U32 fast_mode;
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} Av1dHalCtx;
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#endif /*__HAL_AV1D_GLOBAL_H__*/
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