/*
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* Copyright 2020 Rockchip Electronics Co. LTD
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#define MODULE_TAG "hal_h265d_api"
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#include <stdio.h>
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#include <string.h>
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#include "mpp_env.h"
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#include "mpp_mem.h"
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#include "mpp_debug.h"
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#include "hal_h265d_ctx.h"
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#include "hal_h265d_api.h"
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#include "hal_h265d_rkv.h"
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#include "hal_h265d_vdpu34x.h"
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RK_U32 hal_h265d_debug = 0;
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MPP_RET hal_h265d_init(void *ctx, MppHalCfg *cfg)
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{
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MPP_RET ret = MPP_NOK;
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HalH265dCtx *p = (HalH265dCtx *)ctx;
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MppClientType client_type = VPU_CLIENT_BUTT;
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RK_U32 vcodec_type = mpp_get_vcodec_type();
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RK_U32 hw_id = 0;
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if (!(vcodec_type & (HAVE_RKVDEC | HAVE_HEVC_DEC))) {
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mpp_err_f("Can not found valid H.265 decoder hardware on platform %08x\n", vcodec_type);
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return ret;
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}
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client_type = (vcodec_type & HAVE_HEVC_DEC) ?
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VPU_CLIENT_HEVC_DEC : VPU_CLIENT_RKVDEC;
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ret = mpp_dev_init(&cfg->dev, client_type);
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if (ret) {
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mpp_err("mpp_dev_init failed ret: %d\n", ret);
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return ret;
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}
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hw_id = mpp_get_client_hw_id(client_type);
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p->dev = cfg->dev;
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p->is_v345 = (hw_id == HWID_VDPU345);
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p->is_v34x = (hw_id == HWID_VDPU34X || hw_id == HWID_VDPU38X);
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p->client_type = client_type;
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if (p->is_v34x)
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p->api = &hal_h265d_vdpu34x;
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else
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p->api = &hal_h265d_rkv;
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cfg->support_fast_mode = 1;
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p->slots = cfg->frame_slots;
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p->dec_cb = cfg->dec_cb;
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p->fast_mode = cfg->cfg->base.fast_parse;
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p->packet_slots = cfg->packet_slots;
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mpp_env_get_u32("hal_h265d_debug", &hal_h265d_debug, 0);
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ret = p->api->init(ctx, cfg);
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return ret;
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}
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MPP_RET hal_h265d_deinit(void *ctx)
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{
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MPP_RET ret = MPP_NOK;
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HalH265dCtx *p = (HalH265dCtx *)ctx;
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if (p && p->api && p->api->deinit)
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ret = p->api->deinit(ctx);
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if (p->dev) {
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mpp_dev_deinit(p->dev);
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p->dev = NULL;
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}
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return ret;
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}
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MPP_RET hal_h265d_gen_regs(void *ctx, HalTaskInfo *task)
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{
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MPP_RET ret = MPP_NOK;
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HalH265dCtx *p = (HalH265dCtx *)ctx;
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if (p && p->api && p->api->reg_gen)
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ret = p->api->reg_gen(ctx, task);
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return ret;
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}
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MPP_RET hal_h265d_start(void *ctx, HalTaskInfo *task)
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{
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MPP_RET ret = MPP_NOK;
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HalH265dCtx *p = (HalH265dCtx *)ctx;
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if (p && p->api && p->api->start)
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ret = p->api->start(ctx, task);
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return ret;
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}
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MPP_RET hal_h265d_wait(void *ctx, HalTaskInfo *task)
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{
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MPP_RET ret = MPP_NOK;
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HalH265dCtx *p = (HalH265dCtx *)ctx;
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if (p && p->api && p->api->wait)
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ret = p->api->wait(ctx, task);
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return ret;
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}
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MPP_RET hal_h265d_reset(void *ctx)
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{
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MPP_RET ret = MPP_NOK;
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HalH265dCtx *p = (HalH265dCtx *)ctx;
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if (p && p->api && p->api->reset)
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ret = p->api->reset(ctx);
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return ret;
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}
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MPP_RET hal_h265d_flush(void *ctx)
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{
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MPP_RET ret = MPP_NOK;
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HalH265dCtx *p = (HalH265dCtx *)ctx;
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if (p && p->api && p->api->flush)
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ret = p->api->flush(ctx);
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return ret;
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}
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MPP_RET hal_h265d_control(void *ctx, MpiCmd cmd, void *param)
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{
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MPP_RET ret = MPP_OK;
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HalH265dCtx *p = (HalH265dCtx *)ctx;
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if (p && p->api && p->api->control)
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ret = p->api->control(ctx, cmd, param);
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return ret;
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}
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const MppHalApi hal_api_h265d = {
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.name = "h265d_rkdec",
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.type = MPP_CTX_DEC,
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.coding = MPP_VIDEO_CodingHEVC,
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.ctx_size = sizeof(HalH265dCtx),
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.flag = 0,
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.init = hal_h265d_init,
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.deinit = hal_h265d_deinit,
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.reg_gen = hal_h265d_gen_regs,
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.start = hal_h265d_start,
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.wait = hal_h265d_wait,
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.reset = hal_h265d_reset,
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.flush = hal_h265d_flush,
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.control = hal_h265d_control,
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};
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