/*
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* (C) Copyright 2023 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/hdmi.h>
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#include <linux/compat.h>
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#include "rockchip_display.h"
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#include <spl_display.h>
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#define RK_BLK_SIZE 512
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#define BMP_PROCESSED_FLAG 8399
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static uint32_t crc32_table[256];
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void rockchip_display_make_crc32_table(void)
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{
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uint32_t c;
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int n, k;
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unsigned long poly; /* polynomial exclusive-or pattern */
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/* terms of polynomial defining this crc (except x^32): */
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static const char p[] = {0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26};
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/* make exclusive-or pattern from polynomial (0xedb88320L) */
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poly = 0L;
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for (n = 0; n < sizeof(p) / sizeof(char); n++)
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poly |= 1L << (31 - p[n]);
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for (n = 0; n < 256; n++) {
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c = (unsigned long)n;
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for (k = 0; k < 8; k++)
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c = c & 1 ? poly ^ (c >> 1) : c >> 1;
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crc32_table[n] = cpu_to_le32(c);
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}
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}
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uint32_t rockchip_display_crc32c_cal(unsigned char *data, int length)
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{
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int i;
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uint32_t crc;
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crc = 0xFFFFFFFF;
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for (i = 0; i < length; i++) {
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crc = crc32_table[(crc ^ *data) & 0xff] ^ (crc >> 8);
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data++;
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}
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return crc ^ 0xffffffff;
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}
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/**
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* drm_mode_max_resolution_filter - mark modes out of vop max resolution
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* @edid_data: structure store mode list
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* @max_output: vop max output resolution
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*/
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void drm_mode_max_resolution_filter(struct hdmi_edid_data *edid_data,
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struct vop_rect *max_output)
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{
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int i;
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for (i = 0; i < edid_data->modes; i++) {
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if (edid_data->mode_buf[i].hdisplay > max_output->width ||
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edid_data->mode_buf[i].vdisplay > max_output->height)
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edid_data->mode_buf[i].invalid = true;
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}
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}
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int drm_mode_vrefresh(const struct drm_display_mode *mode)
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{
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int refresh = 0;
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unsigned int calc_val;
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if (mode->vrefresh > 0) {
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refresh = mode->vrefresh;
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} else if (mode->htotal > 0 && mode->vtotal > 0) {
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int vtotal;
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vtotal = mode->vtotal;
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/* work out vrefresh the value will be x1000 */
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calc_val = (mode->clock * 1000);
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calc_val /= mode->htotal;
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refresh = (calc_val + vtotal / 2) / vtotal;
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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refresh *= 2;
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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refresh /= 2;
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if (mode->vscan > 1)
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refresh /= mode->vscan;
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}
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return refresh;
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}
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/**
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* drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
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* @p: mode
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* @adjust_flags: a combination of adjustment flags
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*
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* Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
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*
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* - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
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* interlaced modes.
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* - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
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* buffers containing two eyes (only adjust the timings when needed, eg. for
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* "frame packing" or "side by side full").
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* - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
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* be performed for doublescan and vscan > 1 modes respectively.
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*/
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void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
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{
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if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
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return;
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if (p->flags & DRM_MODE_FLAG_DBLCLK)
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p->crtc_clock = 2 * p->clock;
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else
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p->crtc_clock = p->clock;
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p->crtc_hdisplay = p->hdisplay;
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p->crtc_hsync_start = p->hsync_start;
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p->crtc_hsync_end = p->hsync_end;
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p->crtc_htotal = p->htotal;
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p->crtc_hskew = p->hskew;
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p->crtc_vdisplay = p->vdisplay;
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p->crtc_vsync_start = p->vsync_start;
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p->crtc_vsync_end = p->vsync_end;
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p->crtc_vtotal = p->vtotal;
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if (p->flags & DRM_MODE_FLAG_INTERLACE) {
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if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
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p->crtc_vdisplay /= 2;
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p->crtc_vsync_start /= 2;
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p->crtc_vsync_end /= 2;
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p->crtc_vtotal /= 2;
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}
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}
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if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
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if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
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p->crtc_vdisplay *= 2;
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p->crtc_vsync_start *= 2;
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p->crtc_vsync_end *= 2;
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p->crtc_vtotal *= 2;
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}
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}
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if (!(adjust_flags & CRTC_NO_VSCAN)) {
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if (p->vscan > 1) {
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p->crtc_vdisplay *= p->vscan;
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p->crtc_vsync_start *= p->vscan;
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p->crtc_vsync_end *= p->vscan;
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p->crtc_vtotal *= p->vscan;
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}
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}
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if (adjust_flags & CRTC_STEREO_DOUBLE) {
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unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
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switch (layout) {
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case DRM_MODE_FLAG_3D_FRAME_PACKING:
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p->crtc_clock *= 2;
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p->crtc_vdisplay += p->crtc_vtotal;
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p->crtc_vsync_start += p->crtc_vtotal;
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p->crtc_vsync_end += p->crtc_vtotal;
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p->crtc_vtotal += p->crtc_vtotal;
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break;
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}
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}
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p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
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p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
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p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
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p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
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}
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/**
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* drm_mode_is_420_only - if a given videomode can be only supported in YCBCR420
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* output format
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*
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* @connector: drm connector under action.
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* @mode: video mode to be tested.
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*
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* Returns:
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* true if the mode can be supported in YCBCR420 format
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* false if not.
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*/
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static bool drm_mode_is_420_only(const struct drm_display_info *display,
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struct drm_display_mode *mode)
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{
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u8 vic = drm_match_cea_mode(mode);
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return test_bit(vic, display->hdmi.y420_vdb_modes);
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}
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/**
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* drm_mode_is_420_also - if a given videomode can be supported in YCBCR420
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* output format also (along with RGB/YCBCR444/422)
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*
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* @display: display under action.
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* @mode: video mode to be tested.
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*
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* Returns:
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* true if the mode can be support YCBCR420 format
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* false if not.
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*/
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static bool drm_mode_is_420_also(const struct drm_display_info *display,
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struct drm_display_mode *mode)
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{
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u8 vic = drm_match_cea_mode(mode);
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return test_bit(vic, display->hdmi.y420_cmdb_modes);
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}
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/**
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* drm_mode_is_420 - if a given videomode can be supported in YCBCR420
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* output format
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*
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* @display: display under action.
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* @mode: video mode to be tested.
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*
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* Returns:
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* true if the mode can be supported in YCBCR420 format
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* false if not.
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*/
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bool drm_mode_is_420(const struct drm_display_info *display,
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struct drm_display_mode *mode)
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{
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return drm_mode_is_420_only(display, mode) ||
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drm_mode_is_420_also(display, mode);
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}
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static int display_rect_calc_scale(int src, int dst)
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{
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int scale = 0;
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if (WARN_ON(src < 0 || dst < 0))
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return -EINVAL;
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if (dst == 0)
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return 0;
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src <<= 16;
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if (src > (dst << 16))
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return DIV_ROUND_UP(src, dst);
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else
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scale = src / dst;
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return scale;
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}
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int display_rect_calc_hscale(struct display_rect *src, struct display_rect *dst,
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int min_hscale, int max_hscale)
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{
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int hscale = display_rect_calc_scale(src->w, dst->w);
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if (hscale < 0 || dst->w == 0)
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return hscale;
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if (hscale < min_hscale || hscale > max_hscale)
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return -ERANGE;
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return hscale;
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}
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int display_rect_calc_vscale(struct display_rect *src, struct display_rect *dst,
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int min_vscale, int max_vscale)
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{
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int vscale = display_rect_calc_scale(src->h, dst->h);
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if (vscale < 0 || dst->h == 0)
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return vscale;
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if (vscale < min_vscale || vscale > max_vscale)
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return -ERANGE;
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return vscale;
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}
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