// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3588-evb1-lp4.dtsi"
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#include "rk3588-evb1-imx415.dtsi"
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#include "rk3588-android.dtsi"
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/ {
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model = "Rockchip RK3588 EVB1 LP4 V10 Board + RK3588 EDP 8LANES V10 Ext Board";
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compatible = "rockchip,rk3588-evb1-lp4-v10-edp-8lanes-M280DCA", "rockchip,rk3588";
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panel-edp {
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compatible = "simple-panel";
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backlight = <&backlight>;
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power-supply = <&vcc3v3_edp>;
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enable-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
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prepare-delay-ms = <120>;
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enable-delay-ms = <120>;
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unprepare-delay-ms = <120>;
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disable-delay-ms = <120>;
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display-timings {
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native-mode = <&timing_4kp144>;
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timing_4kp144: timing0 {
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clock-frequency = <1360800000>;
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hactive = <3840>;
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vactive = <2160>;
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hfront-porch = <160>;
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hsync-len = <40>;
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hback-porch = <160>;
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vfront-porch = <40>;
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vsync-len = <10>;
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vback-porch = <40>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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timing_4kp120: timing1 {
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clock-frequency = <1188000000>;
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hactive = <3840>;
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vactive = <2160>;
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hfront-porch = <240>;
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hsync-len = <80>;
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hback-porch = <240>;
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vfront-porch = <40>;
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vsync-len = <10>;
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vback-porch = <40>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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port {
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panel_in_edp: endpoint {
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remote-endpoint = <&edp1_out_panel>;
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};
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};
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};
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vcc3v3_edp_bl: vcc3v3-edp-bl {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_edp_bl";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc12v_dcin>;
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};
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vcc3v3_edp: vcc3v3-edp {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_edp";
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc12v_dcin>;
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};
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};
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&bt_sco {
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status = "okay";
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};
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&bt_sound {
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status = "okay";
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};
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&dsi0 {
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status = "disabled";
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};
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&edp0 {
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force-hpd;
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status = "okay";
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};
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&edp0_in_vp0 {
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status = "okay";
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};
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&edp0_in_vp1 {
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status = "disabled";
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};
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&edp0_in_vp2 {
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status = "disabled";
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};
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&edp1 {
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force-hpd;
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status = "okay";
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dual-channel;
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ports {
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port@1 {
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reg = <1>;
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edp1_out_panel: endpoint {
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remote-endpoint = <&panel_in_edp>;
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};
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};
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};
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};
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&edp1_in_vp0 {
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status = "okay";
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};
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&edp1_in_vp1 {
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status = "disabled";
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};
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&edp1_in_vp2 {
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status = "disabled";
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};
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&hdmi0 {
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status = "disabled";
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};
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&hdmi0_in_vp0 {
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status = "disabled";
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};
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&hdmi0_sound {
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status = "disabled";
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};
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&hdmi1 {
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status = "disabled";
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};
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&hdmi1_in_vp1 {
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status = "disabled";
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};
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&hdmi1_sound {
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status = "disabled";
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};
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&hdptxphy0 {
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status = "okay";
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};
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&hdptxphy1 {
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status = "okay";
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};
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&hdptxphy_hdmi0 {
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status = "disabled";
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};
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&hdptxphy_hdmi1 {
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status = "disabled";
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};
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&i2s2_2ch {
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status = "okay";
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};
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&route_dsi0 {
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status = "disabled";
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};
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&route_edp0 {
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status = "okay";
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connect = <&vp0_out_edp0>;
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};
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&route_edp1 {
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status = "okay";
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connect = <&vp0_out_edp1>;
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};
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&route_hdmi0 {
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status = "disabled";
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};
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&route_hdmi1 {
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status = "disabled";
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};
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&vop {
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assigned-clocks = <&cru ACLK_VOP>;
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assigned-clock-rates = <800000000>;
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};
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&vp0 {
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assigned-clocks = <&cru DCLK_VOP0_SRC>;
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assigned-clock-parents = <&cru PLL_V0PLL>;
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};
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&vp2 {
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-parents;
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};
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