/*
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* Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
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* Author:Mark Yao <mark.yao@rock-chips.com>
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*
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* based on exynos_drm_drv.h
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ROCKCHIP_DRM_DRV_H
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#define _ROCKCHIP_DRM_DRV_H
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#include <drm/drm_crtc.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_gem.h>
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#include <drm/rockchip_drm.h>
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#include <linux/module.h>
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#include <linux/component.h>
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#include <linux/dmabuf_page_pool.h>
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#define ROCKCHIP_MAX_FB_BUFFER 3
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#define ROCKCHIP_MAX_CONNECTOR 2
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#define ROCKCHIP_MAX_CRTC 4
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#define ROCKCHIP_MAX_LAYER 16
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struct drm_device;
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struct drm_connector;
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struct iommu_domain;
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struct rockchip_drm_sub_dev {
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struct list_head list;
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struct drm_connector *connector;
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struct device_node *of_node;
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};
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/*
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* Rockchip drm private crtc funcs.
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* @loader_protect: protect loader logo crtc's power
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* @enable_vblank: enable crtc vblank irq.
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* @disable_vblank: disable crtc vblank irq.
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* @bandwidth: report present crtc bandwidth consume.
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*/
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struct rockchip_crtc_funcs {
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int (*loader_protect)(struct drm_crtc *crtc, bool on);
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int (*enable_vblank)(struct drm_crtc *crtc);
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void (*disable_vblank)(struct drm_crtc *crtc);
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size_t (*bandwidth)(struct drm_crtc *crtc,
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struct drm_crtc_state *crtc_state,
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size_t *frame_bw_mbyte,
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unsigned int *plane_num_total);
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void (*cancel_pending_vblank)(struct drm_crtc *crtc,
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struct drm_file *file_priv);
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int (*debugfs_init)(struct drm_minor *minor, struct drm_crtc *crtc);
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int (*debugfs_dump)(struct drm_crtc *crtc, struct seq_file *s);
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void (*regs_dump)(struct drm_crtc *crtc, struct seq_file *s);
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void (*active_regs_dump)(struct drm_crtc *crtc, struct seq_file *s);
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enum drm_mode_status (*mode_valid)(struct drm_crtc *crtc,
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const struct drm_display_mode *mode,
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int output_type);
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void (*crtc_close)(struct drm_crtc *crtc);
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void (*crtc_send_mcu_cmd)(struct drm_crtc *crtc, u32 type, u32 value);
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void (*te_handler)(struct drm_crtc *crtc);
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};
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struct rockchip_atomic_commit {
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struct drm_atomic_state *state;
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struct drm_device *dev;
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size_t line_bw_mbyte;
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size_t frame_bw_mbyte;
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unsigned int plane_num;
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};
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struct rockchip_dclk_pll {
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struct clk *pll;
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unsigned int use_count;
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};
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struct rockchip_sdr2hdr_state {
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int sdr2hdr_func;
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bool bt1886eotf_pre_conv_en;
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bool rgb2rgb_pre_conv_en;
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bool rgb2rgb_pre_conv_mode;
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bool st2084oetf_pre_conv_en;
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bool bt1886eotf_post_conv_en;
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bool rgb2rgb_post_conv_en;
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bool rgb2rgb_post_conv_mode;
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bool st2084oetf_post_conv_en;
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};
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struct rockchip_hdr_state {
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bool pre_overlay;
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bool hdr2sdr_en;
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struct rockchip_sdr2hdr_state sdr2hdr_state;
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};
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#define VOP_COLOR_KEY_NONE (0 << 31)
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#define VOP_COLOR_KEY_MASK (1 << 31)
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struct rockchip_bcsh_state {
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int brightness;
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int contrast;
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int saturation;
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int sin_hue;
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int cos_hue;
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};
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#define ACM_GAIN_LUT_HY_LENGTH (9*17)
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#define ACM_GAIN_LUT_HY_TOTAL_LENGTH (ACM_GAIN_LUT_HY_LENGTH * 3)
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#define ACM_GAIN_LUT_HS_LENGTH (13*17)
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#define ACM_GAIN_LUT_HS_TOTAL_LENGTH (ACM_GAIN_LUT_HS_LENGTH * 3)
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#define ACM_DELTA_LUT_H_LENGTH 65
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#define ACM_DELTA_LUT_H_TOTAL_LENGTH (ACM_DELTA_LUT_H_LENGTH * 3)
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struct post_acm {
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s16 delta_lut_h[ACM_DELTA_LUT_H_TOTAL_LENGTH];
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s16 gain_lut_hy[ACM_GAIN_LUT_HY_TOTAL_LENGTH];
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s16 gain_lut_hs[ACM_GAIN_LUT_HS_TOTAL_LENGTH];
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u16 y_gain;
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u16 h_gain;
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u16 s_gain;
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u16 acm_enable;
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};
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struct post_csc {
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u16 hue;
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u16 saturation;
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u16 contrast;
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u16 brightness;
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u16 r_gain;
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u16 g_gain;
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u16 b_gain;
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u16 r_offset;
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u16 g_offset;
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u16 b_offset;
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u16 csc_enable;
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};
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#define VOP_OUTPUT_IF_RGB BIT(0)
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#define VOP_OUTPUT_IF_BT1120 BIT(1)
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#define VOP_OUTPUT_IF_BT656 BIT(2)
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#define VOP_OUTPUT_IF_LVDS0 BIT(3)
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#define VOP_OUTPUT_IF_LVDS1 BIT(4)
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#define VOP_OUTPUT_IF_MIPI0 BIT(5)
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#define VOP_OUTPUT_IF_MIPI1 BIT(6)
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#define VOP_OUTPUT_IF_eDP0 BIT(7)
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#define VOP_OUTPUT_IF_eDP1 BIT(8)
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#define VOP_OUTPUT_IF_DP0 BIT(9)
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#define VOP_OUTPUT_IF_DP1 BIT(10)
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#define VOP_OUTPUT_IF_HDMI0 BIT(11)
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#define VOP_OUTPUT_IF_HDMI1 BIT(12)
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#define VOP_OUTPUT_IF_TV BIT(13)
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struct rockchip_crtc_state {
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struct drm_crtc_state base;
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int vp_id;
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/**
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* @hold_mode: enabled when it's:
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* (1) mcu hold mode
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* (2) mipi dsi cmd mode
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* (3) edp psr mode
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*/
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bool hold_mode;
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/**
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* when enable soft_te, use gpio irq to triggle new fs,
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* otherwise use hardware te
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*/
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bool soft_te;
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struct drm_tv_connector_state *tv_state;
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int left_margin;
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int right_margin;
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int top_margin;
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int bottom_margin;
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int vdisplay;
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int afbdc_win_format;
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int afbdc_win_width;
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int afbdc_win_height;
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int afbdc_win_ptr;
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int afbdc_win_id;
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int afbdc_en;
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int afbdc_win_vir_width;
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int afbdc_win_xoffset;
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int afbdc_win_yoffset;
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int dsp_layer_sel;
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int output_type;
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int output_mode;
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int output_bpc;
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int output_flags;
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u32 output_if;
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u32 bus_format;
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u32 bus_flags;
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int yuv_overlay;
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int post_r2y_en;
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int post_y2r_en;
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int post_csc_mode;
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int bcsh_en;
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int color_space;
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int eotf;
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u32 background;
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u32 line_flag;
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u8 mode_update;
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struct rockchip_hdr_state hdr;
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struct drm_property_blob *hdr_ext_data;
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struct drm_property_blob *acm_lut_data;
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struct drm_property_blob *post_csc_data;
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};
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#define to_rockchip_crtc_state(s) \
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container_of(s, struct rockchip_crtc_state, base)
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struct rockchip_drm_vcnt {
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struct drm_pending_vblank_event *event;
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__u32 sequence;
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int pipe;
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};
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struct rockchip_logo {
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dma_addr_t dma_addr;
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void *kvaddr;
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phys_addr_t start;
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phys_addr_t size;
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int count;
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};
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struct loader_cubic_lut {
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bool enable;
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u32 offset;
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};
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/*
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* Rockchip drm private structure.
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*
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* @crtc: array of enabled CRTCs, used to map from "pipe" to drm_crtc.
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* @num_pipe: number of pipes for this device.
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* @mm_lock: protect drm_mm on multi-threads.
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*/
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struct rockchip_drm_private {
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struct rockchip_logo *logo;
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struct dmabuf_page_pool *page_pools;
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struct drm_property *eotf_prop;
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struct drm_property *color_space_prop;
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struct drm_property *global_alpha_prop;
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struct drm_property *blend_mode_prop;
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struct drm_property *alpha_scale_prop;
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struct drm_property *async_commit_prop;
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struct drm_property *share_id_prop;
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struct drm_property *connector_id_prop;
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struct drm_fb_helper *fbdev_helper;
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struct drm_gem_object *fbdev_bo;
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const struct rockchip_crtc_funcs *crtc_funcs[ROCKCHIP_MAX_CRTC];
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struct drm_atomic_state *state;
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struct rockchip_atomic_commit *commit;
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/* protect async commit */
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struct mutex commit_lock;
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/*
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* protect some shared overlay resource
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* OVL_LAYER_SEL/OVL_PORT_SEL
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*/
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struct mutex ovl_lock;
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struct work_struct commit_work;
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struct iommu_domain *domain;
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struct gen_pool *secure_buffer_pool;
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/* protect drm_mm on multi-threads */
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struct mutex mm_lock;
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struct drm_mm mm;
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struct rockchip_dclk_pll default_pll;
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struct rockchip_dclk_pll hdmi_pll;
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struct devfreq *devfreq;
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u8 dmc_support;
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struct list_head psr_list;
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struct mutex psr_list_lock;
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struct rockchip_drm_vcnt vcnt[ROCKCHIP_MAX_CRTC];
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/**
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* @loader_protect
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* ignore restore_fbdev_mode_atomic when in logo on state
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*/
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bool loader_protect;
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dma_addr_t cubic_lut_dma_addr;
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void *cubic_lut_kvaddr;
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struct loader_cubic_lut cubic_lut[ROCKCHIP_MAX_CRTC];
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};
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#ifndef MODULE
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void rockchip_free_loader_memory(struct drm_device *drm);
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#endif
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void rockchip_drm_atomic_work(struct work_struct *work);
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int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
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struct device *dev);
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void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
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struct device *dev);
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int rockchip_register_crtc_funcs(struct drm_crtc *crtc,
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const struct rockchip_crtc_funcs *crtc_funcs);
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void rockchip_unregister_crtc_funcs(struct drm_crtc *crtc);
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int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);
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void rockchip_drm_register_sub_dev(struct rockchip_drm_sub_dev *sub_dev);
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void rockchip_drm_unregister_sub_dev(struct rockchip_drm_sub_dev *sub_dev);
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struct rockchip_drm_sub_dev *rockchip_drm_get_sub_dev(struct device_node *node);
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int rockchip_drm_add_modes_noedid(struct drm_connector *connector);
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void rockchip_drm_te_handle(struct drm_crtc *crtc);
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#if IS_ENABLED(CONFIG_DRM_ROCKCHIP)
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int rockchip_drm_get_sub_dev_type(void);
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#else
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static inline int rockchip_drm_get_sub_dev_type(void)
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{
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return DRM_MODE_CONNECTOR_Unknown;
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}
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#endif
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#if IS_ENABLED(CONFIG_DRM_ROCKCHIP)
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int rockchip_drm_crtc_send_mcu_cmd(struct drm_device *drm_dev,
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struct device_node *np_crtc,
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u32 type, u32 value);
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#else
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static inline int rockchip_drm_crtc_send_mcu_cmd(struct drm_device *drm_dev,
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struct device_node *np_crtc,
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u32 type, u32 value)
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{
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return 0;
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}
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#endif
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extern struct platform_driver cdn_dp_driver;
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extern struct platform_driver dw_hdmi_rockchip_pltfm_driver;
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extern struct platform_driver dw_mipi_dsi_driver;
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extern struct platform_driver inno_hdmi_driver;
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extern struct platform_driver rockchip_dp_driver;
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extern struct platform_driver rockchip_lvds_driver;
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extern struct platform_driver rockchip_tve_driver;
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extern struct platform_driver vop_platform_driver;
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extern struct platform_driver vop2_platform_driver;
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extern struct platform_driver vvop_platform_driver;
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extern struct platform_driver rockchip_rgb_driver;
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#endif /* _ROCKCHIP_DRM_DRV_H_ */
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