/*
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* Rockchip SoC DP (Display Port) interface driver.
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*
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* Copyright (C) Fuzhou Rockchip Electronics Co., Ltd.
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* Author: Andy Yan <andy.yan@rock-chips.com>
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* Yakir Yang <ykk@rock-chips.com>
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* Jeff Chen <jeff.chen@rock-chips.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/component.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of_device.h>
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#include <linux/of_graph.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/reset.h>
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#include <linux/clk.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_dp_helper.h>
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#include <drm/drm_of.h>
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#include <drm/drm_panel.h>
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#include <uapi/linux/videodev2.h>
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#include <video/of_videomode.h>
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#include <video/videomode.h>
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#include <drm/bridge/analogix_dp.h>
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#include "../bridge/analogix/analogix_dp_core.h"
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#include "rockchip_drm_drv.h"
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#include "rockchip_drm_psr.h"
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#include "rockchip_drm_vop.h"
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#define RK3288_GRF_SOC_CON6 0x25c
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#define RK3288_EDP_LCDC_SEL BIT(5)
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#define RK3399_GRF_SOC_CON20 0x6250
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#define RK3399_EDP_LCDC_SEL BIT(5)
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#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
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#define PSR_WAIT_LINE_FLAG_TIMEOUT_MS 100
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#define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm)
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/**
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* struct rockchip_dp_chip_data - splite the grf setting of kind of chips
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* @lcdsel_grf_reg: grf register offset of lcdc select
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* @lcdsel_big: reg value of selecting vop big for eDP
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* @lcdsel_lit: reg value of selecting vop little for eDP
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* @chip_type: specific chip type
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* @ssc: check if SSC is supported by source
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* @audio: check if audio is supported by source
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*/
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struct rockchip_dp_chip_data {
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u32 lcdsel_grf_reg;
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u32 lcdsel_big;
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u32 lcdsel_lit;
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u32 chip_type;
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bool ssc;
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bool audio;
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};
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struct rockchip_dp_device {
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struct drm_device *drm_dev;
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struct device *dev;
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struct drm_encoder encoder;
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struct drm_bridge *bridge;
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struct drm_display_mode mode;
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int num_clks;
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u8 id;
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struct clk_bulk_data *clks;
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struct regmap *grf;
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struct reset_control *rst;
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struct reset_control *apb_reset;
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struct regulator *vcc_supply;
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struct regulator *vccio_supply;
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struct platform_device *audio_pdev;
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const struct rockchip_dp_chip_data *data;
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struct analogix_dp_device *adp;
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struct analogix_dp_plat_data plat_data;
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struct rockchip_drm_sub_dev sub_dev;
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};
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static int rockchip_dp_audio_hw_params(struct device *dev, void *data,
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struct hdmi_codec_daifmt *daifmt,
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struct hdmi_codec_params *params)
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{
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struct rockchip_dp_device *dp = dev_get_drvdata(dev);
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return analogix_dp_audio_hw_params(dp->adp, daifmt, params);
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}
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static void rockchip_dp_audio_shutdown(struct device *dev, void *data)
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{
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struct rockchip_dp_device *dp = dev_get_drvdata(dev);
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analogix_dp_audio_shutdown(dp->adp);
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}
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static int rockchip_dp_audio_startup(struct device *dev, void *data)
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{
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struct rockchip_dp_device *dp = dev_get_drvdata(dev);
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return analogix_dp_audio_startup(dp->adp);
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}
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static int rockchip_dp_audio_get_eld(struct device *dev, void *data,
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u8 *buf, size_t len)
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{
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struct rockchip_dp_device *dp = dev_get_drvdata(dev);
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return analogix_dp_audio_get_eld(dp->adp, buf, len);
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}
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static const struct hdmi_codec_ops rockchip_dp_audio_codec_ops = {
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.hw_params = rockchip_dp_audio_hw_params,
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.audio_startup = rockchip_dp_audio_startup,
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.audio_shutdown = rockchip_dp_audio_shutdown,
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.get_eld = rockchip_dp_audio_get_eld,
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};
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static int analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
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{
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struct rockchip_dp_device *dp = to_dp(encoder);
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int ret;
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if (!analogix_dp_psr_enabled(dp->adp))
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return 0;
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DRM_DEV_DEBUG(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit");
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ret = rockchip_drm_wait_vact_end(dp->encoder.crtc,
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PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
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if (ret) {
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DRM_DEV_ERROR(dp->dev, "line flag interrupt did not arrive\n");
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return -ETIMEDOUT;
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}
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if (enabled)
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return analogix_dp_enable_psr(dp->adp);
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else
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return analogix_dp_disable_psr(dp->adp);
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}
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static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
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{
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reset_control_assert(dp->rst);
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usleep_range(10, 20);
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reset_control_deassert(dp->rst);
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reset_control_assert(dp->apb_reset);
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usleep_range(10, 20);
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reset_control_deassert(dp->apb_reset);
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return 0;
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}
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static int rockchip_dp_poweron_start(struct analogix_dp_plat_data *plat_data)
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{
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struct rockchip_dp_device *dp = to_dp(plat_data);
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int ret;
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if (dp->vcc_supply) {
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ret = regulator_enable(dp->vcc_supply);
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if (ret)
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dev_warn(dp->dev, "failed to enable vcc: %d\n", ret);
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}
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if (dp->vccio_supply) {
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ret = regulator_enable(dp->vccio_supply);
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if (ret)
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dev_warn(dp->dev, "failed to enable vccio: %d\n", ret);
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}
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ret = rockchip_dp_pre_init(dp);
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if (ret < 0) {
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DRM_DEV_ERROR(dp->dev, "failed to dp pre init %d\n", ret);
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return ret;
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}
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return ret;
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}
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static int rockchip_dp_poweron_end(struct analogix_dp_plat_data *plat_data)
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{
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struct rockchip_dp_device *dp = to_dp(plat_data);
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return rockchip_drm_psr_inhibit_put(&dp->encoder);
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}
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static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data)
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{
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struct rockchip_dp_device *dp = to_dp(plat_data);
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int ret;
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ret = rockchip_drm_psr_inhibit_get(&dp->encoder);
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if (ret != 0)
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return ret;
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if (dp->vccio_supply)
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regulator_disable(dp->vccio_supply);
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if (dp->vcc_supply)
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regulator_disable(dp->vcc_supply);
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return 0;
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}
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static int rockchip_dp_get_modes(struct analogix_dp_plat_data *plat_data,
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struct drm_connector *connector)
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{
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struct drm_display_info *di = &connector->display_info;
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/* VOP couldn't output YUV video format for eDP rightly */
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u32 mask = DRM_COLOR_FORMAT_YCRCB444 | DRM_COLOR_FORMAT_YCRCB422;
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int ret = 0;
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if ((di->color_formats & mask)) {
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DRM_DEBUG_KMS("Swapping display color format from YUV to RGB\n");
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di->color_formats &= ~mask;
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di->color_formats |= DRM_COLOR_FORMAT_RGB444;
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di->bpc = 8;
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}
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if (list_empty(&connector->probed_modes) && !plat_data->panel) {
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ret = rockchip_drm_add_modes_noedid(connector);
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DRM_ERROR("analogix dp get edid mode failed, use default mode\n");
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}
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return ret;
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}
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static int rockchip_dp_bridge_attach(struct analogix_dp_plat_data *plat_data,
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struct drm_bridge *bridge,
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struct drm_connector *connector)
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{
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struct rockchip_dp_device *dp = to_dp(plat_data);
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int ret;
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if (dp->bridge) {
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ret = drm_bridge_attach(&dp->encoder, dp->bridge, bridge);
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if (ret) {
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DRM_ERROR("Failed to attach bridge to drm: %d\n", ret);
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return ret;
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}
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}
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return 0;
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}
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static bool
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rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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/* do nothing */
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return true;
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}
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static void rockchip_dp_drm_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted)
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{
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/* do nothing */
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}
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static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder)
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{
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struct rockchip_dp_device *dp = to_dp(encoder);
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int ret;
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u32 val;
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if (!dp->data->lcdsel_grf_reg)
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return;
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ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
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if (ret < 0)
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return;
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if (ret)
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val = dp->data->lcdsel_lit;
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else
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val = dp->data->lcdsel_big;
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DRM_DEV_DEBUG(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
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ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
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if (ret != 0)
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DRM_DEV_ERROR(dp->dev, "Could not write to GRF: %d\n", ret);
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}
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static void rockchip_dp_drm_encoder_disable(struct drm_encoder *encoder)
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{
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struct drm_crtc *crtc = encoder->crtc;
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struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state);
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s->output_if &= ~VOP_OUTPUT_IF_eDP0;
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}
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static int
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rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
|
{
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struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
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struct drm_display_info *di = &conn_state->connector->display_info;
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/*
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* The hardware IC designed that VOP must output the RGB10 video
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* format to eDP controller, and if eDP panel only support RGB8,
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* then eDP controller should cut down the video data, not via VOP
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* controller, that's why we need to hardcode the VOP output mode
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* to RGA10 here.
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*/
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s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
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s->output_type = DRM_MODE_CONNECTOR_eDP;
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s->output_if |= VOP_OUTPUT_IF_eDP0;
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s->output_bpc = di->bpc;
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if (di->num_bus_formats)
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s->bus_format = di->bus_formats[0];
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else
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s->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
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s->bus_flags = di->bus_flags;
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s->tv_state = &conn_state->tv;
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s->eotf = TRADITIONAL_GAMMA_SDR;
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s->color_space = V4L2_COLORSPACE_DEFAULT;
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return 0;
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}
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static int rockchip_dp_drm_encoder_loader_protect(struct drm_encoder *encoder,
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bool on)
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{
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struct rockchip_dp_device *dp = to_dp(encoder);
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int ret;
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if (on) {
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if (dp->vcc_supply) {
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ret = regulator_enable(dp->vcc_supply);
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if (ret)
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dev_warn(dp->dev,
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"failed to enable vcc: %d\n", ret);
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}
|
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if (dp->vccio_supply) {
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ret = regulator_enable(dp->vccio_supply);
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if (ret)
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dev_warn(dp->dev,
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"failed to enable vccio: %d\n", ret);
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}
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rockchip_drm_psr_inhibit_put(&dp->encoder);
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}
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return 0;
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}
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static int rockchip_dp_get_property(struct drm_connector *connector,
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const struct drm_connector_state *state,
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struct drm_property *property,
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u64 *val,
|
struct analogix_dp_plat_data *data)
|
{
|
struct drm_encoder *encoder = data->encoder;
|
struct rockchip_dp_device *dp = to_dp(encoder);
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struct rockchip_drm_private *private = connector->dev->dev_private;
|
|
if (property == private->connector_id_prop) {
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*val = dp->id;
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return 0;
|
}
|
|
DRM_ERROR("failed to get rockchip analogic dp property\n");
|
return -EINVAL;
|
}
|
|
static int rockchip_dp_attach_properties(struct drm_connector *connector)
|
{
|
struct rockchip_drm_private *private = connector->dev->dev_private;
|
|
drm_object_attach_property(&connector->base, private->connector_id_prop, 0);
|
|
return 0;
|
}
|
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static const struct analogix_dp_property_ops rockchip_dp_encoder_property_ops = {
|
.get_property = rockchip_dp_get_property,
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.attach_properties = rockchip_dp_attach_properties,
|
};
|
|
static struct drm_encoder_helper_funcs rockchip_dp_encoder_helper_funcs = {
|
.mode_fixup = rockchip_dp_drm_encoder_mode_fixup,
|
.mode_set = rockchip_dp_drm_encoder_mode_set,
|
.enable = rockchip_dp_drm_encoder_enable,
|
.disable = rockchip_dp_drm_encoder_disable,
|
.atomic_check = rockchip_dp_drm_encoder_atomic_check,
|
.loader_protect = rockchip_dp_drm_encoder_loader_protect,
|
};
|
|
static struct drm_encoder_funcs rockchip_dp_encoder_funcs = {
|
.destroy = drm_encoder_cleanup,
|
};
|
|
static int rockchip_dp_of_probe(struct rockchip_dp_device *dp)
|
{
|
struct device *dev = dp->dev;
|
struct device_node *np = dev->of_node;
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int ret = 0;
|
|
if (of_property_read_bool(np, "rockchip,grf")) {
|
dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
|
if (IS_ERR(dp->grf)) {
|
DRM_DEV_ERROR(dev, "failed to get rockchip,grf\n");
|
return PTR_ERR(dp->grf);
|
}
|
}
|
|
ret = devm_clk_bulk_get_all(dev, &dp->clks);
|
if (ret < 0) {
|
DRM_DEV_ERROR(dev, "failed to get clocks %d\n", ret);
|
return ret;
|
}
|
|
dp->num_clks = ret;
|
|
dp->rst = devm_reset_control_get(dev, "dp");
|
if (IS_ERR(dp->rst)) {
|
DRM_DEV_ERROR(dev, "failed to get dp reset control\n");
|
return PTR_ERR(dp->rst);
|
}
|
|
dp->apb_reset = devm_reset_control_get_optional(dev, "apb");
|
if (IS_ERR(dp->apb_reset)) {
|
DRM_DEV_ERROR(dev, "failed to get apb reset control\n");
|
return PTR_ERR(dp->apb_reset);
|
}
|
|
dp->vcc_supply = devm_regulator_get_optional(dev, "vcc");
|
if (IS_ERR(dp->vcc_supply)) {
|
if (PTR_ERR(dp->vcc_supply) != -ENODEV) {
|
ret = PTR_ERR(dp->vcc_supply);
|
dev_err(dev, "failed to get vcc regulator: %d\n", ret);
|
return ret;
|
}
|
|
dp->vcc_supply = NULL;
|
}
|
|
dp->vccio_supply = devm_regulator_get_optional(dev, "vccio");
|
if (IS_ERR(dp->vccio_supply)) {
|
if (PTR_ERR(dp->vccio_supply) != -ENODEV) {
|
ret = PTR_ERR(dp->vccio_supply);
|
dev_err(dev, "failed to get vccio regulator: %d\n",
|
ret);
|
return ret;
|
}
|
|
dp->vccio_supply = NULL;
|
}
|
|
return 0;
|
}
|
|
static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp)
|
{
|
struct drm_encoder *encoder = &dp->encoder;
|
struct drm_device *drm_dev = dp->drm_dev;
|
struct device *dev = dp->dev;
|
int ret;
|
|
encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
|
dev->of_node);
|
DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs);
|
|
ret = drm_encoder_init(drm_dev, encoder, &rockchip_dp_encoder_funcs,
|
DRM_MODE_ENCODER_TMDS, NULL);
|
if (ret) {
|
DRM_ERROR("failed to initialize encoder with drm\n");
|
return ret;
|
}
|
|
drm_encoder_helper_add(encoder, &rockchip_dp_encoder_helper_funcs);
|
|
return 0;
|
}
|
|
static int rockchip_dp_bind(struct device *dev, struct device *master,
|
void *data)
|
{
|
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
|
const struct rockchip_dp_chip_data *dp_data;
|
struct drm_device *drm_dev = data;
|
int ret;
|
|
dp_data = of_device_get_match_data(dev);
|
if (!dp_data)
|
return -ENODEV;
|
|
dp->data = dp_data;
|
dp->drm_dev = drm_dev;
|
|
ret = rockchip_dp_drm_create_encoder(dp);
|
if (ret) {
|
DRM_ERROR("failed to create drm encoder\n");
|
return ret;
|
}
|
|
dp->plat_data.encoder = &dp->encoder;
|
dp->plat_data.ssc = dp->data->ssc;
|
dp->plat_data.dev_type = dp->data->chip_type;
|
dp->plat_data.power_on_start = rockchip_dp_poweron_start;
|
dp->plat_data.power_on_end = rockchip_dp_poweron_end;
|
dp->plat_data.power_off = rockchip_dp_powerdown;
|
dp->plat_data.get_modes = rockchip_dp_get_modes;
|
dp->plat_data.attach = rockchip_dp_bridge_attach;
|
dp->plat_data.property_ops = &rockchip_dp_encoder_property_ops;
|
|
ret = rockchip_drm_psr_register(&dp->encoder, analogix_dp_psr_set);
|
if (ret < 0)
|
goto err_cleanup_encoder;
|
|
if (dp->data->audio) {
|
struct hdmi_codec_pdata codec_data = {
|
.ops = &rockchip_dp_audio_codec_ops,
|
.spdif = 1,
|
.i2s = 1,
|
.max_i2s_channels = 2,
|
};
|
|
dp->audio_pdev =
|
platform_device_register_data(dev, HDMI_CODEC_DRV_NAME,
|
PLATFORM_DEVID_AUTO,
|
&codec_data,
|
sizeof(codec_data));
|
if (IS_ERR(dp->audio_pdev)) {
|
ret = PTR_ERR(dp->audio_pdev);
|
goto err_unreg_psr;
|
}
|
}
|
|
dp->adp = analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data);
|
if (IS_ERR(dp->adp)) {
|
ret = PTR_ERR(dp->adp);
|
goto err_unreg_audio;
|
}
|
|
dp->sub_dev.connector = &dp->adp->connector;
|
dp->sub_dev.of_node = dev->of_node;
|
rockchip_drm_register_sub_dev(&dp->sub_dev);
|
|
return 0;
|
err_unreg_audio:
|
if (dp->audio_pdev)
|
platform_device_unregister(dp->audio_pdev);
|
err_unreg_psr:
|
rockchip_drm_psr_unregister(&dp->encoder);
|
err_cleanup_encoder:
|
dp->encoder.funcs->destroy(&dp->encoder);
|
return ret;
|
}
|
|
static void rockchip_dp_unbind(struct device *dev, struct device *master,
|
void *data)
|
{
|
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
|
|
rockchip_drm_unregister_sub_dev(&dp->sub_dev);
|
if (dp->audio_pdev)
|
platform_device_unregister(dp->audio_pdev);
|
analogix_dp_unbind(dp->adp);
|
rockchip_drm_psr_unregister(&dp->encoder);
|
dp->encoder.funcs->destroy(&dp->encoder);
|
|
dp->adp = ERR_PTR(-ENODEV);
|
}
|
|
static const struct component_ops rockchip_dp_component_ops = {
|
.bind = rockchip_dp_bind,
|
.unbind = rockchip_dp_unbind,
|
};
|
|
static int rockchip_dp_probe(struct platform_device *pdev)
|
{
|
struct device *dev = &pdev->dev;
|
struct drm_panel *panel = NULL;
|
struct drm_bridge *bridge = NULL;
|
struct rockchip_dp_device *dp;
|
int ret, id;
|
|
ret = drm_of_find_panel_or_bridge(dev->of_node, 1, 0, &panel, &bridge);
|
if (ret < 0 && ret != -ENODEV)
|
return ret;
|
|
dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
|
if (!dp)
|
return -ENOMEM;
|
|
id = of_alias_get_id(dev->of_node, "edp");
|
if (id < 0)
|
id = 0;
|
dp->id = id;
|
dp->dev = dev;
|
dp->adp = ERR_PTR(-ENODEV);
|
dp->plat_data.panel = panel;
|
dp->plat_data.skip_connector = !!bridge;
|
dp->bridge = bridge;
|
|
ret = rockchip_dp_of_probe(dp);
|
if (ret < 0)
|
return ret;
|
|
platform_set_drvdata(pdev, dp);
|
|
return component_add(dev, &rockchip_dp_component_ops);
|
}
|
|
static int rockchip_dp_remove(struct platform_device *pdev)
|
{
|
component_del(&pdev->dev, &rockchip_dp_component_ops);
|
|
return 0;
|
}
|
|
#ifdef CONFIG_PM_SLEEP
|
static int rockchip_dp_suspend(struct device *dev)
|
{
|
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
|
|
if (IS_ERR(dp->adp))
|
return 0;
|
|
return analogix_dp_suspend(dp->adp);
|
}
|
|
static int rockchip_dp_resume(struct device *dev)
|
{
|
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
|
|
if (IS_ERR(dp->adp))
|
return 0;
|
|
return analogix_dp_resume(dp->adp);
|
}
|
|
static int rockchip_dp_runtime_suspend(struct device *dev)
|
{
|
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
|
|
clk_bulk_disable_unprepare(dp->num_clks, dp->clks);
|
|
return 0;
|
}
|
|
static int rockchip_dp_runtime_resume(struct device *dev)
|
{
|
struct rockchip_dp_device *dp = dev_get_drvdata(dev);
|
|
return clk_bulk_prepare_enable(dp->num_clks, dp->clks);
|
}
|
#endif
|
|
static const struct dev_pm_ops rockchip_dp_pm_ops = {
|
#ifdef CONFIG_PM_SLEEP
|
.suspend_late = rockchip_dp_suspend,
|
.resume_early = rockchip_dp_resume,
|
.runtime_suspend = rockchip_dp_runtime_suspend,
|
.runtime_resume = rockchip_dp_runtime_resume,
|
#endif
|
};
|
|
static const struct rockchip_dp_chip_data rk3399_edp = {
|
.lcdsel_grf_reg = RK3399_GRF_SOC_CON20,
|
.lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL),
|
.lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL),
|
.chip_type = RK3399_EDP,
|
.ssc = true,
|
};
|
|
static const struct rockchip_dp_chip_data rk3368_edp = {
|
.chip_type = RK3368_EDP,
|
.ssc = true,
|
};
|
|
static const struct rockchip_dp_chip_data rk3288_dp = {
|
.lcdsel_grf_reg = RK3288_GRF_SOC_CON6,
|
.lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL),
|
.lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL, RK3288_EDP_LCDC_SEL),
|
.chip_type = RK3288_DP,
|
.ssc = true,
|
};
|
|
static const struct rockchip_dp_chip_data rk3568_edp = {
|
.chip_type = RK3568_EDP,
|
.ssc = true,
|
.audio = true,
|
};
|
|
static const struct of_device_id rockchip_dp_dt_ids[] = {
|
{.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp },
|
{.compatible = "rockchip,rk3368-edp", .data = &rk3368_edp },
|
{.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp },
|
{.compatible = "rockchip,rk3568-edp", .data = &rk3568_edp },
|
{}
|
};
|
MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids);
|
|
struct platform_driver rockchip_dp_driver = {
|
.probe = rockchip_dp_probe,
|
.remove = rockchip_dp_remove,
|
.driver = {
|
.name = "rockchip-dp",
|
.pm = &rockchip_dp_pm_ops,
|
.of_match_table = of_match_ptr(rockchip_dp_dt_ids),
|
},
|
};
|
