* Amlogic Meson DWMAC Ethernet controller
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The device inherits all the properties of the dwmac/stmmac devices
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described in the file stmmac.txt in the current directory with the
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following changes.
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Required properties on all platforms:
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- compatible: Depending on the platform this should be one of:
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- "amlogic,meson6-dwmac"
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- "amlogic,meson8b-dwmac"
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- "amlogic,meson8m2-dwmac"
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- "amlogic,meson-gxbb-dwmac"
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- "amlogic,meson-axg-dwmac"
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Additionally "snps,dwmac" and any applicable more
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detailed version number described in net/stmmac.txt
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should be used.
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- reg: The first register range should be the one of the DWMAC
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controller. The second range is is for the Amlogic specific
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configuration (for example the PRG_ETHERNET register range
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on Meson8b and newer)
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Required properties on Meson8b, Meson8m2, GXBB and newer:
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- clock-names: Should contain the following:
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- "stmmaceth" - see stmmac.txt
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- "clkin0" - first parent clock of the internal mux
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- "clkin1" - second parent clock of the internal mux
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Optional properties on Meson8b, Meson8m2, GXBB and newer:
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- amlogic,tx-delay-ns: The internal RGMII TX clock delay (provided
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by this driver) in nanoseconds. Allowed values
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are: 0ns, 2ns, 4ns, 6ns.
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When phy-mode is set to "rgmii" then the TX
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delay should be explicitly configured. When
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not configured a fallback of 2ns is used.
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When the phy-mode is set to either "rgmii-id"
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or "rgmii-txid" the TX clock delay is already
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provided by the PHY. In that case this
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property should be set to 0ns (which disables
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the TX clock delay in the MAC to prevent the
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clock from going off because both PHY and MAC
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are adding a delay).
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Any configuration is ignored when the phy-mode
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is set to "rmii".
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Example for Meson6:
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ethmac: ethernet@c9410000 {
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compatible = "amlogic,meson6-dwmac", "snps,dwmac";
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reg = <0xc9410000 0x10000
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0xc1108108 0x4>;
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interrupts = <0 8 1>;
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interrupt-names = "macirq";
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clocks = <&clk81>;
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clock-names = "stmmaceth";
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}
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Example for GXBB:
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ethmac: ethernet@c9410000 {
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compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac";
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reg = <0x0 0xc9410000 0x0 0x10000>,
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<0x0 0xc8834540 0x0 0x8>;
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interrupts = <0 8 1>;
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interrupt-names = "macirq";
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clocks = <&clkc CLKID_ETH>,
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<&clkc CLKID_FCLK_DIV2>,
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<&clkc CLKID_MPLL2>;
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clock-names = "stmmaceth", "clkin0", "clkin1";
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phy-mode = "rgmii";
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};
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