// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2022 Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <i2c.h>
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#include <max96752f.h>
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#include <asm-generic/gpio.h>
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static int max96752f_select(struct udevice *mux, struct udevice *bus,
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uint channel)
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{
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return 0;
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}
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static int max96752f_deselect(struct udevice *mux, struct udevice *bus,
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uint channel)
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{
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return 0;
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}
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static const struct i2c_mux_ops max96752f_ops = {
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.select = max96752f_select,
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.deselect = max96752f_deselect,
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};
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static uint addr_list[] = {
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0x48, 0x68, 0x6a, 0x4a, 0x4c, 0x6c, 0x28, 0x2a
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};
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void max96752f_init(struct udevice *dev)
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{
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struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
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u32 stream_id = dev_read_u32_default(dev->parent, "reg", 0);
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uint addr = chip->chip_addr;
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int i, ret;
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for (i = 0; i < ARRAY_SIZE(addr_list); i++) {
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chip->chip_addr = addr_list[i];
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ret = dm_i2c_reg_read(dev, 0x000d);
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if (ret < 0)
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continue;
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if (ret == 0x82) {
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dm_i2c_reg_write(dev, 0x0000, addr << 1);
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break;
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}
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}
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chip->chip_addr = addr;
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dm_i2c_reg_clrset(dev, 0x0050, STR_SEL,
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FIELD_PREP(STR_SEL, stream_id));
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dm_i2c_reg_clrset(dev, 0x0073, TX_SRC_ID,
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FIELD_PREP(TX_SRC_ID, stream_id));
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}
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static int max96752f_probe(struct udevice *dev)
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{
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struct gpio_desc enable_gpio;
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int ret;
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ret = i2c_set_chip_offset_len(dev, 2);
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if (ret)
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return ret;
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ret = gpio_request_by_name(dev, "enable-gpios", 0, &enable_gpio,
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GPIOD_IS_OUT);
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if (ret && ret != -ENOENT) {
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dev_err(dev, "%s: failed to get enable GPIO: %d\n",
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__func__, ret);
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return ret;
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}
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if (dm_gpio_is_valid(&enable_gpio)) {
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dm_gpio_set_value(&enable_gpio, 1);
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mdelay(200);
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}
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return 0;
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}
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static const struct udevice_id max96752f_of_match[] = {
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{ .compatible = "maxim,max96752f" },
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{}
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};
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U_BOOT_DRIVER(max96752f) = {
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.name = "max96752f",
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.id = UCLASS_I2C_MUX,
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.of_match = max96752f_of_match,
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.bind = dm_scan_fdt_dev,
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.probe = max96752f_probe,
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.ops = &max96752f_ops,
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};
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