/*
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* Copyright (C) 2010 Francisco Jerez.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "nv04.h"
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#include "fbmem.h"
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#include <subdev/bios.h>
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#include <subdev/bios/init.h>
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static void
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nv10_devinit_meminit(struct nvkm_devinit *init)
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{
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struct nvkm_subdev *subdev = &init->subdev;
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struct nvkm_device *device = subdev->device;
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static const int mem_width[] = { 0x10, 0x00, 0x20 };
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int mem_width_count;
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uint32_t patt = 0xdeadbeef;
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struct io_mapping *fb;
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int i, j, k;
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if (device->card_type >= NV_11 && device->chipset >= 0x17)
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mem_width_count = 3;
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else
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mem_width_count = 2;
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/* Map the framebuffer aperture */
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fb = fbmem_init(device);
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if (!fb) {
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nvkm_error(subdev, "failed to map fb\n");
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return;
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}
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nvkm_wr32(device, NV10_PFB_REFCTRL, NV10_PFB_REFCTRL_VALID_1);
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/* Probe memory bus width */
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for (i = 0; i < mem_width_count; i++) {
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nvkm_mask(device, NV04_PFB_CFG0, 0x30, mem_width[i]);
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for (j = 0; j < 4; j++) {
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for (k = 0; k < 4; k++)
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fbmem_poke(fb, 0x1c, 0);
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fbmem_poke(fb, 0x1c, patt);
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fbmem_poke(fb, 0x3c, 0);
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if (fbmem_peek(fb, 0x1c) == patt)
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goto mem_width_found;
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}
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}
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mem_width_found:
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patt <<= 1;
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/* Probe amount of installed memory */
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for (i = 0; i < 4; i++) {
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int off = nvkm_rd32(device, 0x10020c) - 0x100000;
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fbmem_poke(fb, off, patt);
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fbmem_poke(fb, 0, 0);
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fbmem_peek(fb, 0);
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fbmem_peek(fb, 0);
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fbmem_peek(fb, 0);
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fbmem_peek(fb, 0);
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if (fbmem_peek(fb, off) == patt)
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goto amount_found;
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}
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/* IC missing - disable the upper half memory space. */
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nvkm_mask(device, NV04_PFB_CFG0, 0x1000, 0);
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amount_found:
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fbmem_fini(fb);
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}
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static const struct nvkm_devinit_func
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nv10_devinit = {
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.dtor = nv04_devinit_dtor,
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.preinit = nv04_devinit_preinit,
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.post = nv04_devinit_post,
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.meminit = nv10_devinit_meminit,
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.pll_set = nv04_devinit_pll_set,
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};
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int
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nv10_devinit_new(struct nvkm_device *device, int index,
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struct nvkm_devinit **pinit)
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{
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return nv04_devinit_new_(&nv10_devinit, device, index, pinit);
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}
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