* Rockchip SPI Controller
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The Rockchip SPI controller is used to interface with various devices such as flash
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and display controllers using the SPI communication interface.
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Required Properties:
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- compatible: should be one of the following.
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"rockchip,px30-spi" for px30 SoCs.
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"rockchip,rv1108-spi" for rv1108 SoCs.
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"rockchip,rv1126-spi" for rv1126 SoCs.
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"rockchip,rk3036-spi" for rk3036 SoCs.
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"rockchip,rk3066-spi" for rk3066 SoCs.
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"rockchip,rk3188-spi" for rk3188 SoCs.
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"rockchip,rk3228-spi" for rk3228 SoCs.
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"rockchip,rk3288-spi" for rk3288 SoCs.
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"rockchip,rk3368-spi" for rk3368 SoCs.
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"rockchip,rk3399-spi" for rk3399 SoCs.
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"rockchip,rk3568-spi" for rk3568 SoCs.
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: The interrupt number to the cpu. The interrupt specifier format
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depends on the interrupt controller.
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- clocks: Must contain an entry for each entry in clock-names.
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- clock-names: Shall be "spiclk" for the transfer-clock, and "apb_pclk" for
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the peripheral clock.
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- #address-cells: should be 1.
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- #size-cells: should be 0.
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Optional Properties:
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- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
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Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: DMA request names should include "tx" and "rx" if present.
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- rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling
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Rx data (may need to be fine tuned for high capacitance lines).
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No delay (0) by default.
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- csm: ss_n be high for half or one sclk_out cycle after every frame data is
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transferred:
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- "0" for keep low;
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- "1" for half sclk_out;
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- "2" for one sclk_out.
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- pinctrl-names: Names for the pin configuration(s); may be "default" or
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"sleep", where the "sleep" configuration may describe the state
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the pins should be in during system suspend. See also
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pinctrl/pinctrl-bindings.txt.
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- pinctrl-names: high_speed for speed is higher than 24MHz
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Example:
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spi0: spi@ff110000 {
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compatible = "rockchip,rk3066-spi";
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reg = <0xff110000 0x1000>;
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dmas = <&pdma1 11>, <&pdma1 12>;
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dma-names = "tx", "rx";
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rx-sample-delay-ns = <10>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
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clock-names = "spiclk", "apb_pclk";
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pinctrl-names = "default", "sleep", "high_speed";
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pinctrl-0 = <&spi0_clk &spi0_csn0 &spi0_csn1 &spi0_miso &spi0_mosi>;
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pinctrl-1 = <&spi1_sleep>;
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pinctrl-2 = <&spi0_clk_hs &spi0_csn0 &spi0_csn1 &spi0_miso_hs &spi0_mosi_hs>;
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};
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