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/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef _PHL_EXT_TX_PWR_LMT_DEF_H_
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#define _PHL_EXT_TX_PWR_LMT_DEF_H_
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struct rtw_phl_ext_pwr_lmt_info { /* external tx power limit information */
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s8 ext_pwr_lmt_2_4g[RTW_PHL_MAX_RF_PATH];
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s8 ext_pwr_lmt_5g_band1[RTW_PHL_MAX_RF_PATH]; /*CH36 ~ CH48*/
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s8 ext_pwr_lmt_5g_band2[RTW_PHL_MAX_RF_PATH]; /*CH52 ~ CH64*/
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s8 ext_pwr_lmt_5g_band3[RTW_PHL_MAX_RF_PATH]; /*CH100 ~ CH144*/
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s8 ext_pwr_lmt_5g_band4[RTW_PHL_MAX_RF_PATH]; /*CH149 ~ CH165*/
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s8 ext_pwr_lmt_6g_unii_5_1[RTW_PHL_MAX_RF_PATH]; /* CH1 ~ CH45 */
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s8 ext_pwr_lmt_6g_unii_5_2[RTW_PHL_MAX_RF_PATH]; /* CH49 ~ CH93 */
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s8 ext_pwr_lmt_6g_unii_6[RTW_PHL_MAX_RF_PATH]; /* CH97 ~ CH117 */
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s8 ext_pwr_lmt_6g_unii_7_1[RTW_PHL_MAX_RF_PATH]; /* CH121 ~ CH149 */
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s8 ext_pwr_lmt_6g_unii_7_2[RTW_PHL_MAX_RF_PATH]; /* CH153 ~ CH189 */
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s8 ext_pwr_lmt_6g_unii_8[RTW_PHL_MAX_RF_PATH]; /* CH193 ~ CH237 */
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/* for different power limit by antenna */
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s8 ext_pwr_lmt_ant_2_4g[RTW_PHL_MAX_RF_PATH];
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s8 ext_pwr_lmt_ant_5g_band1[RTW_PHL_MAX_RF_PATH]; /*CH36 ~ CH48*/
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s8 ext_pwr_lmt_ant_5g_band2[RTW_PHL_MAX_RF_PATH]; /*CH52 ~ CH64*/
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s8 ext_pwr_lmt_ant_5g_band3[RTW_PHL_MAX_RF_PATH]; /*CH100 ~ CH144*/
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s8 ext_pwr_lmt_ant_5g_band4[RTW_PHL_MAX_RF_PATH]; /*CH149 ~ CH165*/
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s8 ext_pwr_lmt_ant_6g_unii_5_1[RTW_PHL_MAX_RF_PATH]; /* CH1 ~ CH45 */
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s8 ext_pwr_lmt_ant_6g_unii_5_2[RTW_PHL_MAX_RF_PATH]; /* CH49 ~ CH93 */
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s8 ext_pwr_lmt_ant_6g_unii_6[RTW_PHL_MAX_RF_PATH]; /* CH97 ~ CH117 */
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s8 ext_pwr_lmt_ant_6g_unii_7_1[RTW_PHL_MAX_RF_PATH]; /* CH121 ~ CH149 */
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s8 ext_pwr_lmt_ant_6g_unii_7_2[RTW_PHL_MAX_RF_PATH]; /* CH153 ~ CH189 */
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s8 ext_pwr_lmt_ant_6g_unii_8[RTW_PHL_MAX_RF_PATH]; /* CH193 ~ CH237 */
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};
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struct rtw_phl_cmd_epl_para { /* phl cmd external power limit parameters */
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struct rtw_phl_ext_pwr_lmt_info info;
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u8 upt_info; /* info is updated or not, 0: No, 1: Yes */
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u8 en; /* ext power limit state, 0: disable, 1: enable */
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u8 pwrlmt_rld; /* reload power limit table, 0: No, 1: Yes */
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};
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enum rtw_phl_status
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phl_cmd_updt_ext_txpwr_lmt(void *phl, u8 *param);
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#endif /*_PHL_EXT_TX_PWR_LMT_DEF_H_*/
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