/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef _PHL_TRX_PCIE_H_
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#define _PHL_TRX_PCIE_H_
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#define WP_DELAY_THRES_MS 1000
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#define WD_PAGE_SIZE 128
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enum dump_list_type {
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TYPE_WD_PAGE = 0,
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TYPE_PHL_RING = 1,
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TYPE_RING_STS = 2,
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TYPE_H2C_PKT = 3,
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TYPE_MAX = 0xFF
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};
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#define _CMD_LIST_CPUID 1
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#define _CMD_CPUID_OFFSET 10
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#define _CMD_MAX_CPUID_VAL 20
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#define _CMD_DUMP_WP_PTR 1
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#define _CMD_RESET_WP_PTR 2
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#define _CMD_MAX_RESET_WP_VAL 30
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#define _CMD_DUMP_WD_INFO 1
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#define _CMD_LIST_WP_INFO 2
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#define _CMD_MAX_WD_VAL 40
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#define _CMD_SHOW_WP_OFFSET 10000
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#define _CMD_WP_OFFSET 10
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struct rtw_rx_buf_ring {
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struct rtw_rx_buf *rx_buf;
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_os_list idle_rxbuf_list;
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_os_list busy_rxbuf_list;
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u16 idle_rxbuf_cnt;
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u16 busy_rxbuf_cnt;
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_os_lock idle_rxbuf_lock;
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_os_lock busy_rxbuf_lock;
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#ifdef CONFIG_DYNAMIC_RX_BUF
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_os_list empty_rxbuf_list;
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_os_lock empty_rxbuf_lock;
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u16 empty_rxbuf_cnt;
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#endif
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};
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struct rtw_wp_tag {
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u8 *ptr;
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};
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struct rtw_h2c_work {
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struct rtw_h2c_pkt *cmd;
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struct rtw_h2c_pkt *data;
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struct rtw_h2c_pkt *ldata;
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struct rtw_h2c_pkt **cmd_ring;
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struct rtw_h2c_pkt **data_ring;
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struct rtw_h2c_pkt **ldata_ring;
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_os_lock lock;
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u16 cmd_cnt;
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u16 cmd_idx;
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u16 data_cnt;
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u16 data_idx;
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u16 ldata_cnt;
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u16 ldata_idx;
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};
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#ifdef RTW_WD_PAGE_USE_SHMEM_POOL
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struct rtw_shmem_pool {
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u8 *vir_addr;
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u32 phy_addr_l;
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u32 phy_addr_h;
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u32 buf_len;
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void *os_rsvd[1];
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};
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#endif
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struct rtw_wd_page_ring {
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struct rtw_wd_page *wd_page;
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struct rtw_wd_page *wd_work;
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struct rtw_wd_page **wd_work_ring;
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#ifdef RTW_WD_PAGE_USE_SHMEM_POOL
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struct rtw_shmem_pool wd_page_shmem_pool;
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#endif
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_os_list idle_wd_page_list;
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_os_list busy_wd_page_list;
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_os_list pending_wd_page_list;
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_os_lock idle_lock;
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_os_lock busy_lock;
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_os_lock pending_lock;
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_os_lock work_lock;
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_os_lock wp_tag_lock;
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u16 idle_wd_page_cnt;
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u16 busy_wd_page_cnt;
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u16 pending_wd_page_cnt;
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u16 wd_work_cnt;
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u16 wd_work_idx;
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struct rtw_h2c_work h2c_work;
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struct rtw_wp_tag wp_tag[WP_MAX_SEQ_NUMBER];
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u16 wp_seq;
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u16 cur_hw_res;
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};
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/* struct hana_temp{ */
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/* struct wp_tag wp_tag[DMA_CHANNEL_ENTRY][4096]; */
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/* struct wp_tag wp_tag_hq_b0[4096]; */
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/* struct wp_tag wp_tag_mq_b0[4096]; */
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/* struct wp_tag wp_tag_mq_no_ps_b0[4096]; */
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/* struct wp_tag wp_tag_hq_b1[4096]; */
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/* struct wp_tag wp_tag_mq_b1[4096]; */
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/* struct wp_tag wp_tag_mq_no_ps_b1[4096]; */
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/* }; */
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enum rtw_phl_status phl_hook_trx_ops_pci(struct phl_info_t *phl_info);
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enum rtw_phl_status phl_cmd_set_l2_leave(struct phl_info_t *phl_info);
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#endif /* _PHL_TRX_PCIE_H_ */
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