/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef _HAL_TRX_8852B_H_
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#define _HAL_TRX_8852B_H_
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/* wifi packet(RXD.RPKT_TYPE = 0x0) = 32 bytes, otherwise 16 bytes */
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#define RX_DESC_L_SIZE_8852B 32
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#define RX_DESC_S_SIZE_8852B 16
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#define RX_BD_INFO_SIZE 4
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#define RX_PPDU_MAC_INFO_SIZE_8852B 4
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#define RX_DESC_DRV_INFO_UNIT_8852B 8 /* unit : byte */
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#define ACH0_QUEUE_IDX_8852B 0x0
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#define ACH1_QUEUE_IDX_8852B 0x1
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#define ACH2_QUEUE_IDX_8852B 0x2
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#define ACH3_QUEUE_IDX_8852B 0x3
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#define ACH4_QUEUE_IDX_8852B 0x4
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#define ACH5_QUEUE_IDX_8852B 0x5
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#define ACH6_QUEUE_IDX_8852B 0x6
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#define ACH7_QUEUE_IDX_8852B 0x7
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#define MGQ_B0_QUEUE_IDX_8852B 0x8
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#define HIQ_B0_QUEUE_IDX_8852B 0x9
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#define FWCMD_QUEUE_IDX_8852B 0xc
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/* AX RX DESC */
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/* DWORD 0 ; Offset 00h */
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#define GET_RX_AX_DESC_PKT_LEN_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14)
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#define GET_RX_AX_DESC_SHIFT_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 2)
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#define GET_RX_AX_DESC_HDR_IV_L_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 6)
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#define GET_RX_AX_DESC_BB_SEL_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 22, 1)
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#define GET_RX_AX_DESC_MAC_INFO_VLD_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 23, 1)
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#define GET_RX_AX_DESC_RPKT_TYPE_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 4)
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#define GET_RX_AX_DESC_DRV_INFO_SIZE_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE( __pRxStatusDesc, 28, 3)
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#define GET_RX_AX_DESC_LONG_RXD_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
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/* DWORD 1 ; Offset 04h */
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#define GET_RX_AX_DESC_PPDU_TYPE_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 4)
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#define GET_RX_AX_DESC_PPDU_CNT_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 4, 3)
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#define GET_RX_AX_DESC_SR_EN_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 7, 1)
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#define GET_RX_AX_DESC_USER_ID_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 8, 8)
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#define GET_RX_AX_DESC_RX_DATARATE_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 16, 9)
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#define GET_RX_AX_DESC_RX_GI_LTF_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 25, 3)
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#define GET_RX_AX_DESC_NON_SRG_PPDU_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 28, 1)
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#define GET_RX_AX_DESC_INTER_PPDU_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 29, 1)
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#define GET_RX_AX_DESC_BW_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 30, 2)
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/* DWORD 2 ; Offset 08h */
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#define GET_RX_AX_DESC_FREERUN_CNT_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 32)
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/* DWORD 3 ; Offset 0ch */
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#define GET_RX_AX_DESC_A1_MATCH_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 1)
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#define GET_RX_AX_DESC_SW_DEC_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 1, 1)
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#define GET_RX_AX_DESC_HW_DEC_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 2, 1)
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#define GET_RX_AX_DESC_AMPDU_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 3, 1)
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#define GET_RX_AX_DESC_AMPDU_EDN_PKT_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 4, 1)
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#define GET_RX_AX_DESC_AMSDU_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 5, 1)
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#define GET_RX_AX_DESC_AMSDU_CUT_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 6, 1)
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#define GET_RX_AX_DESC_LAST_MSDU_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 7, 1)
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#define GET_RX_AX_DESC_BYPASS_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 8, 1)
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#define GET_RX_AX_DESC_CRC32_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 9, 1)
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#define GET_RX_AX_DESC_ICVERR_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1)
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#define GET_RX_AX_DESC_MAGIC_WAKE_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1)
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#define GET_RX_AX_DESC_UNICAST_WAKE_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 1)
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#define GET_RX_AX_DESC_PATTERN_WAKE_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 13, 1)
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#define GET_RX_AX_DESC_CH_INFO_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 14, 1)
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#define GET_RX_AX_DESC_STATISTICS_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 15, 1)
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#define GET_RX_AX_DESC_PATTERN_IDX_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 5)
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#define GET_RX_AX_DESC_TARGET_IDC_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 21, 3)
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#define GET_RX_AX_DESC_CHKSUM_OFFLOAD_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 24, 1)
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#define GET_RX_AX_DESC_WITH_LLC_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 25, 1)
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/* DWORD 4 ; Offset 10h */
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#define GET_RX_AX_DESC_TYPE_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 0, 2)
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#define GET_RX_AX_DESC_MC_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 2, 1)
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#define GET_RX_AX_DESC_BC_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 3, 1)
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#define GET_RX_AX_DESC_MD_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 4, 1)
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#define GET_RX_AX_DESC_MF_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 5, 1)
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#define GET_RX_AX_DESC_PWR_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 6, 1)
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#define GET_RX_AX_DESC_QOS_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 7, 1)
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#define GET_RX_AX_DESC_TID_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 8, 4)
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#define GET_RX_AX_DESC_EOSP_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 12, 1)
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#define GET_RX_AX_DESC_HTC_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 13, 1)
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#define GET_RX_AX_DESC_QNULL_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 14, 1)
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#define GET_RX_AX_DESC_SEQ_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 16, 12)
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#define GET_RX_AX_DESC_FRAG_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 28, 4)
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/* DWORD 5 ; Offset 14h */
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#define GET_RX_AX_DESC_CAM_IDX_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 8)
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#define GET_RX_AX_DESC_ADDR_CAM_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 8, 8)
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#define GET_RX_AX_DESC_MACID_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 16, 8)
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#define GET_RX_AX_DESC_PL_ID_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 24, 4)
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#define GET_RX_AX_DESC_CAM_VLD_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 28, 1)
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#define GET_RX_AX_DESC_FWD_EN_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 29, 1)
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#define GET_RX_AX_DESC_PL_MATCH_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 30, 1)
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/* DWORD 6 ; Offset 18h */
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//#define GET_RX_AX_DESC_MAC_ADDR_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+24, 0, 32)
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/* DWORD 7 ; Offset 1ch */
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//#define GET_RX_AX_DESC_MAC_ADDR_H_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+28, 0, 16)
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#define GET_RX_AX_DESC_SEC_TYPE_8852B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+28, 17, 4)
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/*
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0000: WIFI packet
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0001: PPDU status
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0010: channel info
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0011: BB scope mode
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0100: F2P TX CMD report
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0101: SS2FW report
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0110: TX report
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0111: TX payload release to host
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1000: DFS report
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1001: TX payload release to WLCPU
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1010: C2H packet */
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#define RX_8852B_DESC_PKT_T_WIFI 0
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#define RX_8852B_DESC_PKT_T_PPDU_STATUS 1
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#define RX_8852B_DESC_PKT_T_CHANNEL_INFO 2
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#define RX_8852B_DESC_PKT_T_BB_SCOPE 3
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#define RX_8852B_DESC_PKT_T_F2P_TX_CMD_RPT 4
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#define RX_8852B_DESC_PKT_T_SS2FW_RPT 5
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#define RX_8852B_DESC_PKT_T_TX_RPT 6
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#define RX_8852B_DESC_PKT_T_TX_PD_RELEASE_HOST 7
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#define RX_8852B_DESC_PKT_T_DFS_RPT 8
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#define RX_8852B_DESC_PKT_T_TX_PD_RELEASE_WLCPU 9
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#define RX_8852B_DESC_PKT_T_C2H 10
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#define RX_8852B_DESC_PPDU_T_LCCK 0
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#define RX_8852B_DESC_PPDU_T_SCCK 1
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#define RX_8852B_DESC_PPDU_T_OFDM 2
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#define RX_8852B_DESC_PPDU_T_HT 3
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#define RX_8852B_DESC_PPDU_T_HTGF 4
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#define RX_8852B_DESC_PPDU_T_VHT_SU 5
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#define RX_8852B_DESC_PPDU_T_VHT_MU 6
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#define RX_8852B_DESC_PPDU_T_HE_SU 7
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#define RX_8852B_DESC_PPDU_T_HE_ERSU 8
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#define RX_8852B_DESC_PPDU_T_HE_MU 9
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#define RX_8852B_DESC_PPDU_T_HE_TB 10
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#define RX_8852B_DESC_PPDU_T_UNKNOWN 15
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struct rx_ppdu_status{
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u32 mac_info_length;
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u32 phy_info_length;
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//struct mac_info macinfo;
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//struct phy_info phyinfo;
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};
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enum rtw_hal_status
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hal_handle_rx_buffer_8852b(struct rtw_phl_com_t *phl_com,
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struct hal_info_t *hal,
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u8 *buf, u32 buf_len,
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struct rtw_phl_rx_pkt *phl_rx);
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#endif /*_HAL_TRX_8852B_H_*/
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