/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef _HALRF_API_H_
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#define _HALRF_API_H_
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/*@--------------------------[Define] ---------------------------------------*/
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#define HALRF_ABS(a,b) ((a>b) ? (a-b) : (b-a))
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/*@--------------------------[Enum]------------------------------------------*/
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enum phlrf_lna_set {
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PHLRF_LNA_DISABLE = 0,
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PHLRF_LNA_ENABLE = 1,
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};
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enum halrf_rfk_type {
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RF_BTC_IQK = 0,
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RF_BTC_LCK = 1,
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RF_BTC_DPK = 2,
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RF_BTC_TXGAPK = 3,
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RF_BTC_DACK = 4,
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RF_BTC_RXDCK = 5,
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RF_BTC_TSSI = 6,
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RF_BTC_CHLK = 7
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};
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enum halrf_rfk_fwlog {
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RFK_LOG_IQK = 0,
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RFK_LOG_DPK = 1,
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RFK_LOG_DACK = 2,
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RFK_LOG_RXDCK = 3,
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RFK_LOG_TXGAPK = 4,
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RFK_LOG_TSSI = 5,
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RFK_LOG_TXTABLE = 6,
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};
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enum halrf_rfk_process {
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RFK_STOP = 0,
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RFK_START = 1,
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RFK_ONESHOT_START = 2,
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RFK_ONESHOT_STOP = 3
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};
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enum adc_ck {
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ADC_NA = 0,
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ADC_480M = 1,
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ADC_960M = 2,
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ADC_1920M = 3,
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};
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enum dac_ck {
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DAC_40M = 0,
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DAC_80M = 1,
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DAC_120M = 2,
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DAC_160M = 3,
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DAC_240M = 4,
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DAC_320M = 5,
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DAC_480M = 6,
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DAC_960M = 7,
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};
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enum halrf_event_idx {
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RF_EVENT_PWR_TRK = 0,
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RF_EVENT_IQK = 1,
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RF_EVENT_DPK = 2,
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RF_EVENT_TXGAPK = 3,
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RF_EVENT_DACK = 4
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};
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enum halrf_event_func {
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RF_EVENT_OFF = 0,
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RF_EVENT_ON = 1,
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RF_EVENT_TRIGGER = 2
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};
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/*@--------------------------[Structure]-------------------------------------*/
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/*@--------------------------[Prptotype]-------------------------------------*/
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struct rf_info;
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u32 phlrf_psd_log2base(struct rf_info *rf, u32 val);
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void phlrf_rf_lna_setting(struct rf_info *rf, enum phlrf_lna_set type);
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void halrf_bkp(struct rf_info *rf, u32 *bp_reg, u32 *bp, u32 reg_num);
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void halrf_bkprf(struct rf_info *rf, u32 *bp_reg, u32 bp[][4], u32 reg_num, u32 path_num);
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void halrf_reload_bkp(struct rf_info *rf, u32 *bp_reg, u32 *bp, u32 reg_num);
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void halrf_reload_bkprf(struct rf_info *rf,
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u32 *bp_reg,
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u32 bp[][4],
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u32 reg_num,
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u8 path_num);
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u8 halrf_kpath(struct rf_info *rf, enum phl_phy_idx phy_idx);
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void halrf_tmac_tx_pause(struct rf_info *rf, enum phl_phy_idx band_idx, bool pause);
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void halrf_trigger_thermal(struct rf_info *rf);
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u8 halrf_only_get_thermal(struct rf_info *rf, enum rf_path path);
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void halrf_thermal_period(struct rf_info *rf);
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void halrf_btc_rfk_ntfy(struct rf_info *rf, u8 phy_map, enum halrf_rfk_type type,
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enum halrf_rfk_process process);
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void halrf_fcs_init(struct rf_info *rf);
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void halrf_fast_chl_sw_backup(struct rf_info *rf, u8 chl_index, u8 t_index);
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void halrf_fast_chl_sw_reload(struct rf_info *rf, u8 chl_index, u8 t_index);
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/*FW Offload*/
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void halrf_write_fwofld_start(struct rf_info *rf);
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void halrf_write_fwofld_trigger(struct rf_info *rf);
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void halrf_write_fwofld_end(struct rf_info *rf);
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void halrf_quick_check_rf(void *rf_void);
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/*MCC function*/
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void halrf_mcc_info_init(void *rf_void, enum phl_phy_idx phy);
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void halrf_mcc_get_ch_info(void *rf_void, enum phl_phy_idx phy);
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void halrf_watchdog_stop(struct rf_info *rf, bool is_stop);
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/*DBCC*/
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void halrf_chlk_backup_dbcc(struct rf_info *rf, enum phl_phy_idx phy);
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void halrf_chlk_reload_dbcc(struct rf_info *rf, enum phl_phy_idx phy, u8 idx);
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bool halrf_chlk_reload_check_dbcc(struct rf_info *rf, enum phl_phy_idx phy);
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void halrf_reset_io_count(struct rf_info *rf);
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void halrf_common_setting_chl_rfk(struct rf_info *rf, enum phl_phy_idx phy, bool is_before_k);
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bool halrf_is_under_cac(struct rf_info *rf, enum phl_phy_idx phy);
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//
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void halrf_ops_rx_dck(struct rf_info *rf, enum phl_phy_idx phy, bool is_afe);
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//---- txgapk ---
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void halrf_ops_do_txgapk(struct rf_info *rf, enum phl_phy_idx phy);
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void halrf_ops_txgapk_w_table_default(struct rf_info *rf, enum phl_phy_idx phy);
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void halrf_ops_txgapk_enable(struct rf_info *rf, enum phl_phy_idx phy);
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void halrf_ops_txgapk_init(struct rf_info *rf);
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//---------------
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void halrf_ops_tssi_disable(struct rf_info *rf, enum phl_phy_idx phy);
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void halrf_ops_do_tssi(struct rf_info *rf, enum phl_phy_idx phy, bool hwtx_en);
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void halrf_ops_dpk(struct rf_info *rf, enum phl_phy_idx phy, bool force);
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void halrf_ops_dack(struct rf_info *rf, bool force);
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void halrf_ops_lck(struct rf_info *rf);
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void halrf_ops_lck_tracking(struct rf_info *rf);
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void halrf_ops_lo_test(struct rf_info *rf, bool is_on, enum rf_path path);
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void halrf_ops_config_radio_to_fw(struct rf_info *rf);
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void halrf_ops_adie_pow_ctrl(struct rf_info *rf, bool rf_off, bool others_off);
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void halrf_ops_afe_pow_ctrl(struct rf_info *rf, bool adda_off, bool pll_off);
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void halrf_ops_set_gpio_by_ch(struct rf_info *rf, enum phl_phy_idx phy, enum band_type band);
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void halrf_rpt_rt_rfk_info(struct rf_info *rf, enum phl_phy_idx phy, u32 type);
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#endif
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