/******************************************************************************
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*
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* Copyright(c) 2007 - 2020 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __HALBB_HW_CFG_H__
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#define __HALBB_HW_CFG_H__
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/*@--------------------------[Define] ---------------------------------------*/
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#define BB_DONT_CARE 0xff
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#define BB_IF 0x8
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#define BB_ELSE_IF 0x9
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#define BB_ELSE 0xa
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#define BB_END 0xb
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#define BB_CHK 0x4
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#define BB_RXSC_NUM_40 9 /*SC:0,1~8*/
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#define BB_RXSC_NUM_80 13 /*SC:0,1~8,9~12*/
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#define BB_RXSC_NUM_160 15 /*SC:0,1~8,9~12,13~14*/
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#define BB_RXSC_START_IDX_FULL 0
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#define BB_RXSC_START_IDX_20 1
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#define BB_RXSC_START_IDX_20_1 5
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#define BB_RXSC_START_IDX_40 9
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#define BB_RXSC_START_IDX_80 13
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#define BB_BAND_NUM_MAX 12 /*2G:1, 5G:3, 6G:8*/
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#define BB_HIDE_EFUSE_SIZE 55
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#define BB_GT2_TIA_LNA_OP1DB_NUM 8 // [TIA0 & LNA0~6] + [TIA1_LNA6]
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#define BB_GT2_LNA_NUM 7
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#define BB_GT2_TIA_NUM 2
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/*@--------------------------[Enum]------------------------------------------*/
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enum bb_band_t {
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BB_BAND_2G = 0,
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BB_BAND_5G_L = 1,
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BB_BAND_5G_M = 2,
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BB_BAND_5G_H = 3,
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BB_BAND_6G_L = 4,
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BB_BAND_6G_M = 5,
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BB_BAND_6G_H = 6,
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BB_BAND_6G_UH = 7,
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BB_GAIN_BAND_NUM = 8
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};
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enum bb_func_type_gt2_t { /*GT2: Gain Table Gen2*/
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BB_GT2_FUNC_GAIN_ERROR = 0,
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BB_GT2_FUNC_RPL = 1,
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BB_GT2_FUNC_BYPASS = 2,
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BB_GT2_FUNC_OP1DB = 3,
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BB_GT2_FUNC_WBADC = 4
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};
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enum bb_tab_idx_gt2_t { /*GT2: Gain Table Gen2*/
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BB_GT2_TAB_2G = 0,
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BB_GT2_TAB_5G_6G = 1,
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BB_GT2_TAB_NUM = 2
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};
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enum bb_band_gt2_t { /*GT2: Gain Table Gen2*/
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BB_GT2_BAND_2G = 0,
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BB_GT2_BAND_5G_L = 1,
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BB_GT2_BAND_5G_M = 2,
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BB_GT2_BAND_5G_H = 3,
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BB_GT2_BAND_6G_L0 = 4,
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BB_GT2_BAND_6G_L1 = 5,
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BB_GT2_BAND_6G_M0 = 6,
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BB_GT2_BAND_6G_M1 = 7,
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BB_GT2_BAND_6G_H0 = 8,
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BB_GT2_BAND_6G_H1 = 9,
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BB_GT2_BAND_6G_UH0 = 10,
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BB_GT2_BAND_6G_UH1 = 11,
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BB_GT2_BAND_NUM = 12
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};
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enum bb_bw_gt2_t { /*GT2: Gain Table Gen2*/
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BB_GT2_BW_20_40 = 0,
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BB_GT2_BW_80_160_320 = 1,
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BB_GT2_BW_NUM = 2
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};
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enum bb_path_gt2_t { /*GT2: Gain Table Gen2*/
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BB_GT2_PATH_A = 0,
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BB_GT2_PATH_B = 1,
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BB_GT2_PATH_NUM = 2
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};
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/*@--------------------------[Structure]-------------------------------------*/
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struct bb_gain_gen2_info {
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s8 lna_gain[BB_GT2_BAND_NUM][BB_GT2_BW_NUM][BB_GT2_PATH_NUM][BB_GT2_LNA_NUM];
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s8 tia_gain[BB_GT2_BAND_NUM][BB_GT2_BW_NUM][BB_GT2_PATH_NUM][BB_GT2_TIA_NUM];
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s8 lna_op1db[BB_GT2_BAND_NUM][BB_GT2_BW_NUM][BB_GT2_PATH_NUM][BB_GT2_LNA_NUM];
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s8 tia_lna_op1db[BB_GT2_BAND_NUM][BB_GT2_BW_NUM][BB_GT2_PATH_NUM][BB_GT2_TIA_LNA_OP1DB_NUM];
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};
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struct bb_hw_cfg_cr_info {
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u32 lna_gain_cr[BB_GT2_TAB_NUM][BB_GT2_PATH_NUM][BB_GT2_LNA_NUM];
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u32 lna_gain_cr_m[BB_GT2_TAB_NUM][BB_GT2_LNA_NUM];
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u32 tia_gain_cr[BB_GT2_TAB_NUM][BB_GT2_PATH_NUM][BB_GT2_TIA_NUM];
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u32 tia_gain_cr_m[BB_GT2_TAB_NUM][BB_GT2_TIA_NUM];
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u32 lna_op1db_cr[BB_GT2_TAB_NUM][BB_GT2_PATH_NUM][BB_GT2_LNA_NUM];
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u32 lna_op1db_cr_m[BB_GT2_TAB_NUM][BB_GT2_LNA_NUM];
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u32 tia_lna_op1db_cr[BB_GT2_TAB_NUM][BB_GT2_PATH_NUM][BB_GT2_TIA_LNA_OP1DB_NUM];
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u32 tia_lna_op1db_cr_m[BB_GT2_TAB_NUM][BB_GT2_TIA_LNA_OP1DB_NUM];
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};
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struct bb_hw_cfg_info {
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struct bb_hw_cfg_cr_info bb_hw_cfg_cr_i;
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bool gain_table_init_ready_2g_a;
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bool gain_table_init_ready_2g_b;
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enum bb_bw_gt2_t curr_5g_6g_cfg_bw_gt2;
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enum bb_band_gt2_t curr_5g_6g_cfg_band_gt2;
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};
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/*@--------------------------[Prptotype]-------------------------------------*/
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struct bb_info;
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void halbb_set_lna_tia_gain_bbcr_gt2(struct bb_info *bb, u8 central_ch, enum band_type band_type, enum channel_width bw, enum rf_path path);
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bool halbb_sel_headline(struct bb_info *bb, u32 *array, u32 array_len,
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u8 *headline_size, u8 *headline_idx);
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void halbb_cfg_bb_rpl_ofst(struct bb_info *bb, enum bb_band_t band, u8 path, u32 addr, u32 data);
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bool halbb_init_cr_default(struct bb_info *bb, bool is_form_folder, u32 folder_len,
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u32 *folder_array, enum phl_phy_idx phy_idx);
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bool halbb_init_gain_table(struct bb_info *bb, bool is_form_folder, u32 folder_len,
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u32 *folder_array, enum phl_phy_idx phy_idx);
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void halbb_rx_gain_table_dbg(struct bb_info *bb, char input[][16],
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u32 *_used, char *output, u32 *_out_len);
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void halbb_rx_op1db_table_dbg(struct bb_info *bb, char input[][16],
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u32 *_used, char *output, u32 *_out_len);
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void halbb_hw_cfg_init(struct bb_info *bb);
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void halbb_cr_cfg_hw_cfg_init(struct bb_info *bb);
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#endif
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