/******************************************************************************
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*
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* Copyright(c) 2007 - 2020 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __HALBB_DFS_H__
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#define __HALBB_DFS_H__
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/*@--------------------------[Define] ---------------------------------------*/
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#define DFS_RPT_LENGTH 8
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#define DFS_RDR_TYP_NUM 8
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#define DFS_L_RDR_IDX 6
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#define DFS_SPCL_RDR_IDX_ETSI 3
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#define PW_FTR_IDLE 1
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#define PRI_FTR_IDLE 1
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#define PW_FTR 3
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#define PRI_FTR 3
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#define DFS_PPB_PRCNT 4
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#define DFS_PPB_IDLE_PRCNT 5
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#define DFS_CHIRP_TH 3
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#define DFS_FCC_LP_LNGTH 12 /*Real Waveform length of FCC-LP is 12 secs*/
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#define DFS_MAX_SEQ_NUM 127
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#define DFS_ADPTV_CNT1 1
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#define DFS_ADPTV_CNT2 1
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#define DFS_ADPTV_CNT_TH 30
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#define DFS_Normal_State 0
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#define DFS_Adaptive_State 1
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/*@--------------------------[Enum]------------------------------------------*/
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/*@--------------------------[Structure]-------------------------------------*/
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struct bb_dfs_cr_info {
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u32 dfs_en;
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u32 dfs_en_m;
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u32 tw_dfs_en;
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u32 tw_dfs_en_m;
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u32 dfs_en_p1;
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u32 dfs_en_p1_m;
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u32 dfs_l2h_th;
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u32 dfs_l2h_th_m;
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};
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struct bb_dfs_info {
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struct bb_dfs_cr_info bb_dfs_cr_i;
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//============= Used by TW DFS ==============//
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bool is_tw_en;
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bool bypass_seg0;
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//===========================================//
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u8 dfs_rgn_domain;
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u8 ppb_prcnt;
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u16 pw_rpt[DFS_MAX_SEQ_NUM];
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u8 pri_rpt[DFS_MAX_SEQ_NUM];
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u8 seq_num_rpt[DFS_MAX_SEQ_NUM];
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u8 seq_num_rpt_all[DFS_MAX_SEQ_NUM];
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bool chrp_rpt[DFS_MAX_SEQ_NUM];
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//============= Used by TW DFS ==============//
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bool seg_rpt[DFS_MAX_SEQ_NUM];
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bool seg_rpt_all[DFS_MAX_SEQ_NUM];
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//===========================================//
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//u8 chrp_cnt;
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//u8 chrp_th;
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u32 chrp_srt_t;
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u8 lng_rdr_cnt;
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u8 chrp_rdr_cnt;
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u8 lng_rdr_cnt_pre;
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//============= Used by TW DFS ==============//
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u32 chrp_srt_t_sg1;
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u8 n_cnfd_lvl_sg1;
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u8 chrp_rdr_cnt_sg1;
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u8 lng_rdr_cnt_sg1;
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u8 lng_rdr_cnt_sg1_pre;
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//===========================================//
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u8 srt_rdr_cnt[DFS_RDR_TYP_NUM];
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u8 pw_lbd[DFS_RDR_TYP_NUM];
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u16 pw_ubd[DFS_RDR_TYP_NUM];
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u8 pri_lbd[DFS_RDR_TYP_NUM];
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u8 pri_ubd[DFS_RDR_TYP_NUM];
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u8 pw_min_tab[DFS_RDR_TYP_NUM];
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u16 pw_max_tab[DFS_RDR_TYP_NUM];
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u8 pri_min_tab[DFS_RDR_TYP_NUM];
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u8 pri_max_tab[DFS_RDR_TYP_NUM];
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u8 ppb_tab[DFS_RDR_TYP_NUM];
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u8 ppb_typ_th[DFS_RDR_TYP_NUM];
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u8 lst_seq_num;
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u8 lst_seg_idx;
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u8 pw_factor;
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u8 pri_factor;
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//============= Used by TW DFS ==============//
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u8 srt_rdr_cnt_sg1[DFS_RDR_TYP_NUM];
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u8 lst_seq_num_sg1;
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u8 rpt_sg_history;
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u8 rpt_sg_history_all;
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//===========================================//
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bool is_mic_w53;
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bool is_mic_w56;
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bool l_rdr_exst_flag;
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bool chrp_obsrv_flag;
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bool n_seq_flag;
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//============= Used by TW DFS ==============//
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bool chrp_obsrv_flag_sg1;
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bool n_seq_flag_sg1;
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//===========================================//
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bool idle_flag;
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bool first_dyn_set_flag;
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bool dyn_reset_flag;
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bool dfs_sw_trgr_mode;
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bool dfs_dbg_mode;
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bool dbg_dyn_prnt_en;
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bool dbg_hwdet_prnt_en;
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bool dbg_swdet_prnt_en;
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bool dbg_trivil_prnt_en;
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bool dbg_brk_prnt_en;
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bool mask_fake_rpt_en;
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u8 fk_dfs_num_th;
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u8 dfs_tp_th;
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u8 dfs_idle_prd_th;
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u16 dfs_fa_th;
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u8 dfs_nhm_th;
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bool dfs_dyn_setting_en;
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u8 adap_detect_cnt;
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u8 adap_detect_cnt_init;
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u8 adap_detect_cnt_add;
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u8 adap_detect_cnt_all;
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u8 adap_detect_cnt_th;
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u8 detect_state;
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bool adap_detect_brk_en;
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u8 pri_mask_th;
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u8 rpt_rdr_cnt;
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bool dfs_dyn_aci_en;
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u8 dfs_aci_adaptv_th0;
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u8 dfs_aci_adaptv_th1;
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u8 dfs_aci_idx;
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s8 ACI2SIG_db;
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bool dfs_aci_is_read;
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u8 no_aci_rpt_cnt;
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u8 no_aci_rpt_th;
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bool In_CAC_Flag;
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u16 pw_diff_th;
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u16 pw_lng_chrp_diff_th;
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u16 pri_diff_th;
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u16 pw_max_th;
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u16 invalid_lng_pulse_h_th;
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u16 invalid_lng_pulse_l_th;
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u16 min_pw_shrt[DFS_RDR_TYP_NUM];
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u16 min_pw_lng;
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u16 min_pw_chrp;
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u16 min_pri_shrt[DFS_RDR_TYP_NUM];
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u16 max_pw_shrt[DFS_RDR_TYP_NUM];
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u16 max_pw_lng;
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u16 max_pw_chrp;
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u16 max_pri_shrt[DFS_RDR_TYP_NUM];
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u16 pw_diff_shrt[DFS_RDR_TYP_NUM];
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u16 pri_diff_shrt[DFS_RDR_TYP_NUM];
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//============= Used by TW DFS ==============//
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u16 min_pw_shrt_sg1[DFS_RDR_TYP_NUM];
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u16 min_pw_lng_sg1;
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u16 min_pw_chrp_sg1;
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u16 min_pri_shrt_sg1[DFS_RDR_TYP_NUM];
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u16 max_pw_shrt_sg1[DFS_RDR_TYP_NUM];
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u16 max_pw_lng_sg1;
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u16 max_pw_chrp_sg1;
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u16 max_pri_shrt_sg1[DFS_RDR_TYP_NUM];
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u16 pw_diff_shrt_sg1[DFS_RDR_TYP_NUM];
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u16 pw_diff_lng_sg1;
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u16 pri_diff_shrt_sg1[DFS_RDR_TYP_NUM];
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//===========================================//
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//============== MSFT Only ==================//
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u8 dfs_mask_l2h_val;
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u8 dfs_backup_l2h_val;
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//===========================================//
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};
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struct bb_dfs_rpt {
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u8 *dfs_ptr;
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u16 dfs_num;
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u8 phy_idx; /*phy0,phy1*/
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};
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#ifdef HALBB_TW_DFS_SERIES
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#if (PLATFOM_IS_LITTLE_ENDIAN)
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struct bb_rdr_info {
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u8 rdr_info_sg1_chirp_flag : 1; /*[18:9],[8:1],[0]*/
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u8 rdr_info_sg1_pri_l : 7;
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u8 rdr_info_sg1_pri_m : 1;
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u8 rdr_info_sg1_pw_l : 7;
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u8 rdr_info_sg1_pw_m : 3;
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u8 rdr_info_sg0_chirp_flag : 1; /*[37:28],[27:20],[19]*/
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u8 rdr_info_sg0_pri_l : 4;
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u8 rdr_info_sg0_pri_m : 4;
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u8 rdr_info_sg0_pw_l : 4;
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u8 rdr_info_sg0_pw_m : 6;
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u8 rdr_info_rsvd_l : 2; /*[48:38]*/
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u8 rdr_info_rsvd_m;
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u8 rdr_info_rsvd_h : 1;
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u8 rdr_info_sg1_seq : 7; /*[55:49]*/
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u8 rdr_info_sg0_seq : 7; /*[62:56]*/
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u8 rdr_info_path_opt : 1; /*[63]*/
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};
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#else
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struct bb_rdr_info {
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u8 rdr_info_sg1_pri_l : 7;
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u8 rdr_info_sg1_chirp_flag : 1;
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u8 rdr_info_sg1_pw_l : 7;
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u8 rdr_info_sg1_pri_m : 1;
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u8 rdr_info_sg0_pri_l : 4;
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u8 rdr_info_sg0_chirp_flag : 1;
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u8 rdr_info_sg1_pw_m : 3;
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u8 rdr_info_sg0_pw_l : 4;
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u8 rdr_info_sg0_pri_m : 4;
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u8 rdr_info_rsvd_l : 2;
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u8 rdr_info_sg0_pw_m : 6;
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u8 rdr_info_rsvd_m;
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u8 rdr_info_sg1_seq : 7;
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u8 rdr_info_rsvd_h : 1;
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u8 rdr_info_path_opt : 1;
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u8 rdr_info_sg0_seq : 7;
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};
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#endif
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#else
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#if (PLATFOM_IS_LITTLE_ENDIAN)
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struct bb_rdr_info {
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u8 rdr_info_sg0_chirp_flag:1; /*[18:9],[8:1],[0]*/
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u8 rdr_info_sg0_pri_l:7;
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u8 rdr_info_sg0_pri_m:1;
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u8 rdr_info_sg0_pw_l:7;
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u8 rdr_info_sg0_pw_m:3;
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u8 rdr_info_sg1_chirp_flag:1; /*[37:28],[27:20],[19]*/
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u8 rdr_info_sg1_pri_l:4;
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u8 rdr_info_sg1_pri_m:4;
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u8 rdr_info_sg1_pw_l:4;
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u8 rdr_info_sg1_pw_m:6;
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u8 rdr_info_zw_chirp_flag:1; /*[56:47],[46:39],[38]*/
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u8 rdr_info_zw_pri_l:1;
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u8 rdr_info_zw_pri_m:7;
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u8 rdr_info_zw_pw_l:1;
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u8 rdr_info_zw_pw_m;
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u8 rdr_info_zw_pw_h:1;
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u8 rdr_info_seq:7;
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};
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#else
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struct bb_rdr_info {
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u8 rdr_info_sg0_pri_l:7;
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u8 rdr_info_sg0_chirp_flag:1;
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u8 rdr_info_sg0_pw_l:7;
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u8 rdr_info_sg0_pri_m:1;
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u8 rdr_info_sg1_pri_l:4;
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u8 rdr_info_sg1_chirp_flag:1;
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u8 rdr_info_sg0_pw_m:3;
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u8 rdr_info_sg1_pw_l:4;
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u8 rdr_info_sg1_pri_m:4;
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u8 rdr_info_zw_pri_l:1;
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u8 rdr_info_zw_chirp_flag:1;
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u8 rdr_info_sg1_pw_m:6;
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u8 rdr_info_zw_pw_l:1;
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u8 rdr_info_zw_pri_m:7;
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u8 rdr_info_zw_pw_m;
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u8 rdr_info_seq:7;
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u8 rdr_info_zw_pw_h:1;
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};
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#endif
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#endif
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/*@--------------------------[Prptotype]-------------------------------------*/
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struct bb_info;
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struct hal_dfs_rpt;
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void halbb_dfs(struct bb_info *bb);
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void halbb_mac_cfg_dfs_rpt(struct bb_info *bb, bool rpt_en);
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void halbb_dfs_rgn_dmn_dflt_cnfg(struct bb_info *bb);
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void halbb_dfs_rgn_dmn_cnfg_by_ch(struct bb_info *bb, bool w53_band,
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bool w56_band);
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void halbb_radar_chrp_mntr(struct bb_info *bb, bool chrp_flag, bool is_sg1);
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void halbb_radar_seq_inspctn(struct bb_info *bb, u16 dfs_rpt_idx,
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u8 c_num, u8 p_num, bool is_sg1, u8 c_seg, u8 p_seg);
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void halbb_radar_ptrn_cmprn(struct bb_info *bb, u16 dfs_rpt_idx,
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u8 pri, u16 pw, bool chrp_flag, bool is_sg1);
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void halbb_radar_info_processing(struct bb_info *bb,
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struct hal_dfs_rpt *dfs_rpt, u16 dfs_rpt_idx);
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void halbb_parsing_aci2sig(struct bb_info* bb, u32 physts_bitmap);
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void halbb_dfs_dyn_setting(struct bb_info *bb);
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void halbb_dfs_debug(struct bb_info *bb, char input[][16], u32 *_used,
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char *output, u32 *_out_len);
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void halbb_cr_cfg_dfs_init(struct bb_info *bb);
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#endif
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