/******************************************************************************
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*
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* Copyright(c) 2020 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef _HALBB_API_EX_H_
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#define _HALBB_API_EX_H_
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#include "halbb_ic_hw_info.h"
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#include "halbb_api.h"
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/*@--------------------------[Prptotype]-------------------------------------*/
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struct bb_info;
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struct bb_mcc_i {
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enum role_type type;
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struct rtw_chan_def *chandef;
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u32 *macid_bitmap;
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u8 macid_map_len;
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u8 self_macid;
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};
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u8 halbb_ex_cn_report(struct bb_info * bb);
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u8 halbb_ex_evm_1ss_report(struct bb_info *bb);
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u8 halbb_ex_evm_max_report(struct bb_info *bb);
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u8 halbb_ex_evm_min_report(struct bb_info *bb);
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bool halbb_tx_cfr_byrate_sup(struct bb_info *bb);
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u16 halbb_cfg_cmac_tx_ant(struct bb_info *bb, enum rf_path tx_path);
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void halbb_gpio_setting_all(struct bb_info *bb, u8 rfe_idx);
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void halbb_gpio_setting(struct bb_info *bb, u8 gpio_idx, enum bb_path path,
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bool inv, enum bb_rfe_src_sel src);
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u8 halbb_get_txsc(struct bb_info *bb, u8 pri_ch, u8 central_ch,
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enum channel_width cbw, enum channel_width dbw);
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u8 halbb_get_txsb(struct bb_info *bb, u8 pri_ch, u8 central_ch,
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enum channel_width cbw, enum channel_width dbw);
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void halbb_bb_reset_all(struct bb_info *bb, enum phl_phy_idx phy_idx);
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bool halbb_bb_reset_cmn(struct bb_info *bb, bool en, enum phl_phy_idx phy_idx);
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void halbb_reset_bb(struct bb_info *bb);
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u32 halbb_read_rf_reg(struct bb_info *bb, enum rf_path path, u32 addr, u32 mask);
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bool halbb_write_rf_reg(struct bb_info *bb, enum rf_path path, u32 addr, u32 mask,
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u32 data);
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bool halbb_rf_set_bb_reg(struct bb_info *bb, u32 addr, u32 bit_mask, u32 data);
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u32 halbb_rf_get_bb_reg(struct bb_info *bb, u32 addr, u32 mask);
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void halbb_ctrl_rf_mode(struct bb_info *bb, enum phl_rf_mode mode);
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void halbb_ctrl_rf_mode_rx_path(struct bb_info *bb, enum rf_path rx_path);
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bool halbb_ctrl_tx_path_bb_afe_map(struct bb_info *bb, u8 mapping_idx);
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bool halbb_ctrl_rx_path(struct bb_info *bb, enum rf_path rx_path,
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enum phl_phy_idx phy_idx);
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bool halbb_ctrl_tx_path_pmac(struct bb_info *bb, enum rf_path tx_path,
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enum phl_phy_idx phy_idx);
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bool halbb_cfg_rx_path(struct bb_info *bb, enum bb_path rx_path,
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enum phl_phy_idx phy_idx);
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bool halbb_cfg_tx_path_pmac(struct bb_info *bb, enum bb_path tx_path,
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enum phl_phy_idx phy_idx);
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bool halbb_cfg_tx_path(struct bb_info *bb, enum bb_path tx_path,
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enum phl_phy_idx phy_idx);
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void halbb_ctrl_trx_path(struct bb_info *bb, enum rf_path tx_path, u8 tx_nss,
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enum rf_path rx_path, u8 rx_nss);
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void halbb_cfg_trx_path(struct bb_info *bb, struct bb_tx_path_en_info tx_path_i,
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struct bb_rx_path_en_info rx_path_i, enum mlo_dbcc_mode_type mode);
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void halbb_tssi_bb_reset(struct bb_info *bb);
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void halbb_dfs_en(struct bb_info *bb, bool en);
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void halbb_adc_ctrl_en(struct bb_info *bb, bool en, enum phl_phy_idx phy_idx);
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void halbb_adc_en(struct bb_info *bb, bool en);
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bool halbb_adc_cfg(struct bb_info *bb, enum channel_width bw, enum rf_path path,
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enum phl_phy_idx phy_idx);
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void halbb_tssi_cont_en(struct bb_info *bb, bool en, enum rf_path path);
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void halbb_bb_reset_en(struct bb_info *bb, bool en, enum phl_phy_idx phy_idx);
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bool halbb_ctrl_bw(struct bb_info *bb, u8 pri_ch, enum band_type band, enum channel_width bw,
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enum phl_phy_idx phy_idx);
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bool halbb_ctrl_bw_ch(struct bb_info *bb, u8 pri_ch, u8 central_ch_seg0,
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u8 central_ch_seg1, enum band_type band,
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enum channel_width bw, enum phl_phy_idx phy_idx);
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#if (HLABB_CODE_BASE_NUM >= 32)
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bool halbb_pre_ctrl_bw_ch(struct bb_info *bb, enum phl_phy_idx phy_idx);
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bool halbb_post_ctrl_bw_ch(struct bb_info *bb, enum phl_phy_idx phy_idx);
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#endif
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void halbb_ctrl_rx_cca(struct bb_info *bb, bool cca_en, enum phl_phy_idx phy_idx);
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bool halbb_query_cck_en(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_ctrl_cck_en(struct bb_info *bb, bool cck_enable,
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enum phl_phy_idx phy_idx);
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void halbb_ctrl_ofdm_en(struct bb_info *bb, bool ofdm_enable,
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enum phl_phy_idx phy_idx);
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void halbb_ctrl_btg(struct bb_info *bb, bool btg);
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void halbb_ctrl_btc_preagc(struct bb_info *bb, bool bt_en);
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void halbb_btg_bt_rx(struct bb_info *bb, bool en, enum phl_phy_idx phy_idx);
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void halbb_nbtg_bt_tx(struct bb_info *bb, bool en, enum phl_phy_idx phy_idx);
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void halbb_pop_en(struct bb_info *bb, bool en, enum phl_phy_idx phy_idx);
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bool halbb_querry_pop_en(struct bb_info *bb, enum phl_phy_idx phy_idx);
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bool halbb_set_pd_lower_bound(struct bb_info *bb, u8 bound,
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enum channel_width bw, enum phl_phy_idx phy_idx);
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bool halbb_set_pd_lower_bound_cck(struct bb_info *bb, u8 bound,
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enum channel_width bw, enum phl_phy_idx phy_idx);
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u8 halbb_querry_pd_lower_bound(struct bb_info *bb, bool get_en_info,
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enum phl_phy_idx phy_idx);
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u8 halbb_get_losel(struct bb_info *bb);
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void halbb_set_ant(struct bb_info *bb, u8 ant);
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void halbb_syn_sel(struct bb_info *bb, enum rf_path path, bool val,
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enum phl_phy_idx phy_idx);
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void halbb_bb_wrap_set_pow_by_rate_all(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_bb_wrap_set_pwr_limit_rua_all(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_bb_wrap_set_pwr_limit_all(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_bb_wrap_set_pwr_ofst_mode_all(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_bb_wrap_set_pwr_ofst_bw_all(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_bb_wrap_set_pwr_limit_en(struct bb_info *bb, enum phl_phy_idx phy_idx);
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enum rtw_hal_status halbb_emlsr_en(struct bb_info *bb, bool en);
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#if (HLABB_CODE_BASE_NUM >= 32)
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bool halbb_ctrl_mlo(struct bb_info *bb, enum mlo_dbcc_mode_type mode);
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#endif
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void halbb_set_igi(struct bb_info *bb, u8 lna_idx, bool tia_idx, u8 rxbb_idx,
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enum rf_path path);
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void halbb_set_tx_pow_pattern_shap(struct bb_info *bb, u8 ch,
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bool is_ofdm, enum phl_phy_idx phy_idx);
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void halbb_set_tx_pow_per_path_lmt(struct bb_info *bb, s16 pwr_lmt_a, s16 pwr_lmt_b);
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void halbb_set_tx_pow_ref(struct bb_info *bb, enum phl_phy_idx phy_idx);
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void halbb_normal_efuse_verify(struct bb_info *bb, s8 rx_gain_offset,
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enum rf_path rx_path, enum phl_phy_idx phy_idx);
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u8 halbb_upd_mcc_macid(struct bb_info *bb, struct bb_mcc_i *mi);
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void halbb_mcc_stop(struct bb_info *bb);
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u8 halbb_mcc_start(struct bb_info *bb, struct bb_mcc_i *mi_1,
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struct bb_mcc_i *mi_2);
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void halbb_normal_efuse_verify_cck(struct bb_info *bb, s8 rx_gain_offset,
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enum rf_path rx_path,
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enum phl_phy_idx phy_idx);
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enum rtw_hal_status halbb_config_cmac_tbl(struct bb_info *bb, struct rtw_phl_stainfo_t *phl_sta_i,
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void *cctrl,
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void *cctl_info_mask);
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extern bool halbb_lps_info(struct bb_info *bb, u16 mac_id);
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extern bool halbb_lps_save_ch_info(struct bb_info *bb);
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extern bool halbb_lps_info_status_chk(struct bb_info *bb);
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void halbb_agc_fix_gain(struct bb_info *bb, bool enable, enum rf_path path,
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enum phl_phy_idx phy_idx);
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void halbb_agc_elna_idx(struct bb_info *bb, bool elna_idx, enum rf_path path,
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enum phl_phy_idx phy_idx);
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void halbb_agc_tia_shrink(struct bb_info *bb, bool shrink_en, bool shrink_init,
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enum rf_path path, enum phl_phy_idx phy_idx);
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void halbb_npath_en_update(struct bb_info *bb, bool npath_en);
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#endif
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