/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#include "mac_ax.h"
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#include "mac_ax/mac_priv.h"
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#define CHIP_ID_HW_DEF_8852A 0x50
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#define CHIP_ID_HW_DEF_8852B 0x51
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#define CHIP_ID_HW_DEF_8852C 0x52
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#define CHIP_ID_HW_DEF_8192XB 0x53
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#define CHIP_ID_HW_DEF_8851B 0x54
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#define CHIP_ID_HW_DEF_8851E 0x55
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#define CHIP_ID_HW_DEF_8852D 0x56
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#define CHIP_ID_HW_DEF_8852BT 0x57
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#define CHIP_ID_HW_DEF_1115E 0x70
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#define PID_HW_DEF_8852AS 0xA852
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#define PID_HW_DEF_8852BS 0xB852
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#define PID_HW_DEF_8852BSA 0xB85B
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#define PID_HW_DEF_8851ASA 0x8851
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#define PID_HW_DEF_8852BPS 0xA85C
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#define PID_HW_DEF_8852CS 0xC852
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#define PID_HW_DEF_8192XBS 0x0192
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#define PID_HW_DEF_8851BS 0xB851
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#define PID_HW_DEF_8851BSM 0xB51A
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#define PID_HW_DEF_8851ES 0x851E
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#define PID_HW_DEF_8852DS 0xD852
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#define PID_HW_DEF_8852BTS 0xB925
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#define PID_HW_DEF_1115ES 0x892A
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#define SDIO_FN0_CIS_PID 0x1004
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#define SDIO_WAIT_CNT 50
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#define MAC_AX_INDIR_CNT 23
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#if MAC_AX_SDIO_SUPPORT
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static u8 r8_indir_cmd52_sdio(void *drv_adapter,
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struct mac_ax_pltfm_cb *pltfm_cb, u32 adr);
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#endif
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#ifndef CONFIG_NEW_HALMAC_INTERFACE
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static u8 chk_pltfm_cb(void *drv_adapter, enum mac_ax_intf intf,
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struct mac_ax_pltfm_cb *pltfm_cb)
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{
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if (!pltfm_cb)
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return MACSUCCESS;
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if (!pltfm_cb->msg_print)
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return MACSUCCESS;
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#if MAC_AX_SDIO_SUPPORT
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if (!pltfm_cb->sdio_cmd52_r8 || !pltfm_cb->sdio_cmd53_r8 ||
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!pltfm_cb->sdio_cmd53_r16 || !pltfm_cb->sdio_cmd53_r32 ||
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!pltfm_cb->sdio_cmd53_rn || !pltfm_cb->sdio_cmd52_w8 ||
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!pltfm_cb->sdio_cmd53_w8 || !pltfm_cb->sdio_cmd53_w16 ||
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!pltfm_cb->sdio_cmd53_w32 || !pltfm_cb->sdio_cmd53_wn ||
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!pltfm_cb->sdio_cmd52_cia_r8) {
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pltfm_cb->msg_print(drv_adapter, _PHL_ERR_, "[ERR]CB-SDIO\n");
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return MACSUCCESS;
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}
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#endif
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#if (MAC_AX_USB_SUPPORT || MAC_AX_PCIE_SUPPORT)
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if (!pltfm_cb->reg_r8 || !pltfm_cb->reg_r16 ||
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!pltfm_cb->reg_r32 || !pltfm_cb->reg_w8 ||
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!pltfm_cb->reg_w16 || !pltfm_cb->reg_w32) {
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pltfm_cb->msg_print(drv_adapter, _PHL_ERR_, "[ERR]CB-USB or PCIE\n");
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return MACSUCCESS;
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}
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#endif
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if (!pltfm_cb->rtl_free || !pltfm_cb->rtl_malloc ||
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!pltfm_cb->rtl_memcpy || !pltfm_cb->rtl_memset ||
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!pltfm_cb->rtl_delay_us || !pltfm_cb->rtl_delay_ms ||
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!pltfm_cb->rtl_sleep_us || !pltfm_cb->rtl_sleep_ms ||
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!pltfm_cb->rtl_mutex_init || !pltfm_cb->rtl_mutex_deinit ||
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!pltfm_cb->rtl_mutex_lock || !pltfm_cb->rtl_mutex_unlock ||
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!pltfm_cb->event_notify || !pltfm_cb->get_chip_id) {
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pltfm_cb->msg_print(drv_adapter, _PHL_ERR_, "[ERR]CB-OS\n");
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return MACSUCCESS;
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}
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return MACPFCB;
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}
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#endif /*CONFIG_NEW_HALMAC_INTERFACE*/
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static u8 chk_pltfm_endian(void)
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{
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u32 num = 1;
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u8 *num_ptr = (u8 *)#
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if (*num_ptr != PLATFOM_IS_LITTLE_ENDIAN)
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return MACSUCCESS;
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return MACPFCB;
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}
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static u8 get_analog_info(struct mac_ax_adapter *adapter)
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{
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#if MAC_AX_8852B_SUPPORT || MAC_AX_8851B_SUPPORT || MAC_AX_8852BT_SUPPORT
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u32 ret;
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u8 xtal_si_val;
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if (is_chip_id(adapter, MAC_AX_CHIP_ID_8852B) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8851B) ||
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is_chip_id(adapter, MAC_AX_CHIP_ID_8852BT)) {
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ret = mac_read_xtal_si(adapter, XTAL_SI_CV, &xtal_si_val);
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if (ret)
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PLTFM_MSG_ERR("Read XTAL_SI fail!\n");
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xtal_si_val = (xtal_si_val & acv_mask);
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adapter->hw_info->acv = xtal_si_val;
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}
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#endif
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return MACSUCCESS;
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}
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#ifdef CONFIG_NEW_HALMAC_INTERFACE
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#if MAC_AX_SDIO_SUPPORT
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static u8 r8_indir_cmd52_sdio(void *drv_adapter,
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struct mac_ax_pltfm_cb *pltfm_cb, u32 adr)
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{
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u8 tmp;
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u32 cnt;
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PLTFM_SDIO_CMD52_W8(R_AX_SDIO_INDIRECT_ADDR, (u8)adr);
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PLTFM_SDIO_CMD52_W8(R_AX_SDIO_INDIRECT_ADDR + 1, (u8)(adr >> 8));
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PLTFM_SDIO_CMD52_W8(R_AX_SDIO_INDIRECT_ADDR + 2, (u8)(adr >> 16));
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PLTFM_SDIO_CMD52_W8(R_AX_SDIO_INDIRECT_ADDR + 3,
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(u8)((adr | B_AX_INDIRECT_RDY) >> 24));
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PLTFM_SDIO_CMD52_W8(R_AX_SDIO_INDIRECT_CTRL, (u8)B_AX_INDIRECT_REG_R);
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cnt = SDIO_WAIT_CNT;
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do {
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tmp = PLTFM_SDIO_CMD52_R8(R_AX_SDIO_INDIRECT_ADDR + 3);
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cnt--;
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} while (((tmp & BIT(7)) == 0) && (cnt > 0));
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if (((tmp & BIT(7)) == 0) && cnt == 0)
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PLTFM_MSG_ERR("[ERR]sdio indirect CMD52 read\n");
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return PLTFM_SDIO_CMD52_R8(R_AX_SDIO_INDIRECT_DATA);
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}
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static u8 get_chip_id_hw_def_sdio(void *drv_adapter,
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struct mac_ax_pltfm_cb *pltfm_cb, u32 adr)
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{
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u16 pid;
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pid = PLTFM_SDIO_CMD52_CIA_R8(SDIO_FN0_CIS_PID) |
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(PLTFM_SDIO_CMD52_CIA_R8(SDIO_FN0_CIS_PID + 1) << 8);
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switch (pid) {
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case PID_HW_DEF_8852AS:
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return CHIP_ID_HW_DEF_8852A;
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case PID_HW_DEF_8852BS:
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case PID_HW_DEF_8852BSA:
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case PID_HW_DEF_8851ASA:
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case PID_HW_DEF_8852BPS:
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return CHIP_ID_HW_DEF_8852B;
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case PID_HW_DEF_8852CS:
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return CHIP_ID_HW_DEF_8852C;
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case PID_HW_DEF_8192XBS:
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return CHIP_ID_HW_DEF_8192XB;
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case PID_HW_DEF_8851BS:
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case PID_HW_DEF_8851BSM:
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return CHIP_ID_HW_DEF_8851B;
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case PID_HW_DEF_8851ES:
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return CHIP_ID_HW_DEF_8851E;
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case PID_HW_DEF_8852DS:
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return CHIP_ID_HW_DEF_8852D;
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case PID_HW_DEF_1115ES:
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return CHIP_ID_HW_DEF_1115E;
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case PID_HW_DEF_8852BTS:
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return CHIP_ID_HW_DEF_8852BT;
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default:
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PLTFM_MSG_WARN("[WARN]read sdio local PID fail\n");
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break;
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}
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return r8_dir_cmd52_sdio(drv_adapter, adr);
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}
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#endif
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static bool chk_get_chip_info(u8 chip_id, u8 cv)
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{
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switch (chip_id) {
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case MAC_AX_CHIP_ID_8852A:
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switch (cv) {
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case CAV:
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return PATCH_ENABLE;
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case CBV:
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return PATCH_ENABLE;
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case CCV:
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return PATCH_DISABLE;
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case CDV:
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//fall through
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default:
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return PATCH_DISABLE;
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}
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default:
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return PATCH_DISABLE;
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}
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}
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static u32 get_chip_info(struct mac_ax_adapter *adapter,
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struct mac_ax_pltfm_cb *pltfm_cb,
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enum mac_ax_intf intf, u8 *id, u8 *cv)
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{
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u32 cv_temp;
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u8 cur_id;
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u32 ret;
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if (!cv || !id)
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return MACNPTR;
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switch (intf) {
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#if MAC_AX_SDIO_SUPPORT
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case MAC_AX_INTF_SDIO:
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cur_id = r8_indir_cmd52_sdio(adapter, R_AX_SYS_CHIPINFO);
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*cv = r8_indir_cmd52_sdio(adapter, R_AX_SYS_CFG1 + 1) >> 4;
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break;
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#endif
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#if (MAC_AX_USB_SUPPORT || MAC_AX_PCIE_SUPPORT)
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case MAC_AX_INTF_USB:
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case MAC_AX_INTF_PCIE:
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cur_id = PLTFM_REG_R8(R_AX_SYS_CHIPINFO);
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*cv = PLTFM_REG_R8(R_AX_SYS_CFG1 + 1) >> 4;
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if (chk_get_chip_info(cur_id, *cv) == PATCH_ENABLE) {
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cv_temp = PLTFM_REG_R32(R_AX_GPIO0_7_FUNC_SEL);
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if (cv_temp == 0xdeadbeef)
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*cv = CAV;
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else
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*cv = CBV;
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}
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break;
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#endif
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default:
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return MACINTF;
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}
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ret = xlat_chip_id(cur_id, id);
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if (ret != MACSUCCESS)
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return ret;
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return MACSUCCESS;
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}
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u32 mac_ax_ops_init_v1(void *phl_adapter, void *drv_adapter,
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enum rtw_chip_id chip_id,
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enum rtw_hci_type hci,
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struct mac_ax_adapter **mac_adapter,
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struct mac_ax_ops **mac_ops)
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{
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u32 ret;
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u8 cv;
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struct mac_ax_adapter *adapter;
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enum mac_ax_intf intf = MAC_AX_INTF_INVALID;
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if (!chk_pltfm_endian())
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return MACPFED;
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ret = 0;
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if (hci == RTW_HCI_PCIE)
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intf = MAC_AX_INTF_PCIE;
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else if (hci == RTW_HCI_USB)
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intf = MAC_AX_INTF_USB;
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else if (hci == RTW_HCI_SDIO)
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intf = MAC_AX_INTF_SDIO;
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ret = get_chip_info(drv_adapter, NULL, intf, &chip_id, &cv);
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if (ret)
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return ret;
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adapter = get_mac_ax_adapter(intf, chip_id, cv, phl_adapter,
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drv_adapter, NULL);
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if (!adapter) {
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PLTFM_MSG_PRINT("[ERR]Get MAC adapter\n");
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return MACADAPTER;
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}
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PLTFM_MSG_ALWAYS("MAC_AX_MAJOR_VER = %d\n"
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"MAC_AX_PROTOTYPE_VER = %d\n"
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"MAC_AX_SUB_VER = %d\n"
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"MAC_AX_SUB_INDEX = %d\n",
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MAC_AX_MAJOR_VER, MAC_AX_PROTOTYPE_VER,
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MAC_AX_SUB_VER, MAC_AX_SUB_INDEX);
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*mac_adapter = adapter;
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*mac_ops = adapter->ops;
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return MACSUCCESS;
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}
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#else
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#if MAC_AX_SDIO_SUPPORT
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static u8 r8_indir_cmd52_sdio(void *drv_adapter,
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struct mac_ax_pltfm_cb *pltfm_cb, u32 adr)
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{
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u8 tmp;
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u32 cnt;
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pltfm_cb->sdio_cmd52_w8(drv_adapter, R_AX_SDIO_INDIRECT_ADDR,
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(u8)adr);
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pltfm_cb->sdio_cmd52_w8(drv_adapter, R_AX_SDIO_INDIRECT_ADDR + 1,
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(u8)(adr >> 8));
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pltfm_cb->sdio_cmd52_w8(drv_adapter, R_AX_SDIO_INDIRECT_ADDR + 2,
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(u8)(adr >> 16));
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pltfm_cb->sdio_cmd52_w8(drv_adapter, R_AX_SDIO_INDIRECT_ADDR + 3,
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(u8)((adr | B_AX_INDIRECT_RDY) >> 24));
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pltfm_cb->sdio_cmd52_w8(drv_adapter, R_AX_SDIO_INDIRECT_CTRL,
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(u8)B_AX_INDIRECT_REG_R);
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cnt = SDIO_WAIT_CNT;
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do {
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tmp = pltfm_cb->sdio_cmd52_r8(drv_adapter,
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R_AX_SDIO_INDIRECT_ADDR + 3);
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cnt--;
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} while (((tmp & BIT(7)) == 0) && (cnt > 0));
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if (((tmp & BIT(7)) == 0) && cnt == 0)
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pltfm_cb->msg_print(drv_adapter, _PHL_ERR_,
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"[ERR]sdio indirect CMD52 read\n");
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return pltfm_cb->sdio_cmd52_r8(drv_adapter, R_AX_SDIO_INDIRECT_DATA);
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}
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static u8 r8_dir_cmd52_sdio(void *drv_adapter,
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struct mac_ax_pltfm_cb *pltfm_cb, u32 adr)
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{
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/* Original: Use indirect access WLAN reg due to SDIO power off*/
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/* SDIO reg changes after 8852C (0x1000 -> 0x4000) */
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/* -> SDIO indirect access reg is uncertain before get_chip_info */
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/* Fix: CMD52 direct read WLAN reg and repeat several times */
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/* to sync SDIO reg with MAC reg */
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/* MAC reg is in MAC clk domain & SDIO reg is in SDIO clk domain */
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u32 cnt;
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cnt = MAC_AX_INDIR_CNT;
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do {
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pltfm_cb->sdio_cmd52_r8(drv_adapter, adr);
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cnt--;
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} while (cnt);
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return pltfm_cb->sdio_cmd52_r8(drv_adapter, adr);
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}
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static u8 get_chip_id_hw_def_sdio(void *drv_adapter,
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struct mac_ax_pltfm_cb *pltfm_cb, u32 adr)
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{
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u16 pid;
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pid = pltfm_cb->sdio_cmd52_cia_r8(drv_adapter, SDIO_FN0_CIS_PID) |
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(pltfm_cb->sdio_cmd52_cia_r8(drv_adapter, SDIO_FN0_CIS_PID + 1) << 8);
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switch (pid) {
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case PID_HW_DEF_8852AS:
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return CHIP_ID_HW_DEF_8852A;
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case PID_HW_DEF_8852BS:
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case PID_HW_DEF_8852BSA:
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case PID_HW_DEF_8851ASA:
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case PID_HW_DEF_8852BPS:
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return CHIP_ID_HW_DEF_8852B;
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case PID_HW_DEF_8852CS:
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return CHIP_ID_HW_DEF_8852C;
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case PID_HW_DEF_8192XBS:
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return CHIP_ID_HW_DEF_8192XB;
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case PID_HW_DEF_8851BS:
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case PID_HW_DEF_8851BSM:
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return CHIP_ID_HW_DEF_8851B;
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case PID_HW_DEF_8851ES:
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return CHIP_ID_HW_DEF_8851E;
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case PID_HW_DEF_8852DS:
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return CHIP_ID_HW_DEF_8852D;
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case PID_HW_DEF_1115ES:
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return CHIP_ID_HW_DEF_1115E;
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case PID_HW_DEF_8852BTS:
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return CHIP_ID_HW_DEF_8852BT;
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default:
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break;
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}
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return r8_dir_cmd52_sdio(drv_adapter, pltfm_cb, adr);
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}
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#endif
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static bool chk_get_chip_info(u8 chip_id, u8 cv)
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{
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switch (chip_id) {
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case MAC_AX_CHIP_ID_8852A:
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switch (cv) {
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case CAV:
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return PATCH_ENABLE;
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case CBV:
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return PATCH_ENABLE;
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case CCV:
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return PATCH_DISABLE;
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case CDV:
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//fall through
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default:
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return PATCH_DISABLE;
|
}
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default:
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return PATCH_DISABLE;
|
}
|
}
|
|
static u32 get_chip_info(void *drv_adapter, struct mac_ax_pltfm_cb *pltfm_cb,
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enum mac_ax_intf intf, u8 *id, u8 *cv)
|
{
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u8 cur_id;
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u32 ret;
|
|
if (!cv || !id)
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return MACNPTR;
|
|
switch (intf) {
|
#if MAC_AX_SDIO_SUPPORT
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case MAC_AX_INTF_SDIO:
|
cur_id = r8_indir_cmd52_sdio(drv_adapter, pltfm_cb,
|
R_AX_SYS_CHIPINFO);
|
*cv = r8_indir_cmd52_sdio(drv_adapter, pltfm_cb,
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R_AX_SYS_CFG1 + 1) >> 4;
|
if (chk_get_chip_info(cur_id, *cv) == PATCH_ENABLE)
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*cv = CBV;
|
break;
|
#endif
|
#if (MAC_AX_USB_SUPPORT || MAC_AX_PCIE_SUPPORT)
|
case MAC_AX_INTF_USB:
|
case MAC_AX_INTF_PCIE:
|
cur_id = pltfm_cb->reg_r8(drv_adapter, R_AX_SYS_CHIPINFO);
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*cv = pltfm_cb->reg_r8(drv_adapter, R_AX_SYS_CFG1 + 1) >> 4;
|
if (chk_get_chip_info(cur_id, *cv) == PATCH_ENABLE)
|
*cv = CBV;
|
break;
|
#endif
|
default:
|
return MACINTF;
|
}
|
|
ret = xlat_chip_id(cur_id, id);
|
if (ret != MACSUCCESS)
|
return ret;
|
|
return MACSUCCESS;
|
}
|
|
u32 mac_ax_ops_init(void *drv_adapter, struct mac_ax_pltfm_cb *pltfm_cb,
|
enum mac_ax_intf intf,
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struct mac_ax_adapter **mac_adapter,
|
struct mac_ax_ops **mac_ops)
|
{
|
u32 ret;
|
u8 chip_id = 0;
|
u8 cv = 0;
|
struct mac_ax_adapter *adapter;
|
struct mac_ax_priv_ops *p_ops;
|
|
if (!chk_pltfm_cb(drv_adapter, intf, pltfm_cb))
|
return MACPFCB;
|
|
if (!chk_pltfm_endian())
|
return MACPFED;
|
|
pltfm_cb->msg_print(drv_adapter, _PHL_ERR_,
|
"MAC_AX_MAJOR_VER = %d\n"
|
"MAC_AX_PROTOTYPE_VER = %d\n"
|
"MAC_AX_SUB_VER = %d\n"
|
"MAC_AX_SUB_INDEX = %d\n",
|
MAC_AX_MAJOR_VER, MAC_AX_PROTOTYPE_VER,
|
MAC_AX_SUB_VER, MAC_AX_SUB_INDEX);
|
|
ret = get_chip_info(drv_adapter, pltfm_cb, intf, &chip_id, &cv);
|
if (ret)
|
return ret;
|
|
adapter = get_mac_ax_adapter(intf, chip_id, cv, drv_adapter,
|
pltfm_cb);
|
if (!adapter) {
|
pltfm_cb->msg_print(drv_adapter, _PHL_ERR_, "[ERR]Get MAC adapter\n");
|
return MACADAPTER;
|
}
|
|
*mac_adapter = adapter;
|
*mac_ops = adapter->ops;
|
|
#if MAC_AX_SDIO_SUPPORT
|
/* should call halmac IO API before SDIO tbl (mutex) init*/
|
ret = sdio_tbl_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]sdio tbl init %d\n", ret);
|
return ret;
|
}
|
#endif
|
|
#if MAC_AX_FEATURE_HV
|
adapter->hv_ops = get_hv_ax_ops(adapter);
|
#endif
|
|
#if MAC_AX_PHL_H2C
|
|
#else
|
ret = h2cb_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]h2cb init %d\n", ret);
|
return ret;
|
}
|
#endif
|
|
ret = role_tbl_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]role tbl init %d\n", ret);
|
return ret;
|
}
|
|
p_ops = adapter_to_priv_ops(adapter);
|
ret = p_ops->sec_info_tbl_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]sec info tbl init %d\n", ret);
|
return ret;
|
}
|
|
ret = efuse_info_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]efuse info init %d\n", ret);
|
return ret;
|
}
|
|
ret = p2p_info_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]p2p info init %d\n", ret);
|
return ret;
|
}
|
|
ret = mport_info_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]mpinfo info init %d\n", ret);
|
return ret;
|
}
|
|
ret = mix_info_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]mix info init %d\n", ret);
|
return ret;
|
}
|
|
ret = hfc_info_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]hfc info init %d\n", ret);
|
return ret;
|
}
|
|
ret = twt_info_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]twt info init %d\n", ret);
|
return ret;
|
}
|
|
ret = dbcc_info_init(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]dbcc info init %d\n", ret);
|
return ret;
|
}
|
|
ret = get_analog_info(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]get_analog_info %d\n", ret);
|
return ret;
|
}
|
|
return MACSUCCESS;
|
}
|
#endif /*CONFIG_NEW_HALMAC_INTERFACE*/
|
|
#if MAC_AX_PHL_H2C
|
u32 mac_ax_phl_init(void *phl_adapter, struct mac_ax_adapter *mac_adapter)
|
{
|
struct mac_ax_adapter *adapter = mac_adapter;
|
|
adapter->phl_adapter = phl_adapter;
|
|
return MACSUCCESS;
|
}
|
#endif
|
u32 mac_ax_ops_exit(struct mac_ax_adapter *adapter)
|
{
|
u32 ret;
|
struct mac_ax_priv_ops *p_ops = adapter_to_priv_ops(adapter);
|
struct mac_ax_cmd_ofld_info *ofld_info = &adapter->cmd_ofld_info;
|
struct scan_chinfo_list *scan_list;
|
u32 priv_size;
|
u8 band_idx;
|
|
ret = h2cb_exit(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]h2c buffer exit %d\n", ret);
|
return ret;
|
}
|
|
if (ofld_info->buf) {
|
PLTFM_FREE(ofld_info->buf, CMD_OFLD_MAX_LEN);
|
ofld_info->buf = NULL;
|
}
|
|
ret = p_ops->free_sec_info_tbl(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]sec table exit %d\n", ret);
|
return ret;
|
}
|
|
ret = role_tbl_exit(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]role table exit %d\n", ret);
|
return ret;
|
}
|
|
ret = efuse_info_exit(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]efuse info exit %d\n", ret);
|
return ret;
|
}
|
|
ret = p2p_info_exit(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]p2p info exit %d\n", ret);
|
return ret;
|
}
|
|
ret = mport_info_exit(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]mpinfo info exit %d\n", ret);
|
return ret;
|
}
|
|
ret = mix_info_exit(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]mix info exit %d\n", ret);
|
return ret;
|
}
|
|
#if MAC_AX_SDIO_SUPPORT
|
ret = sdio_tbl_exit(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]efuse table exit %d\n", ret);
|
return ret;
|
}
|
#endif
|
|
ret = hfc_info_exit(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]hfc info exit %d\n", ret);
|
return ret;
|
}
|
|
ret = twt_info_exit(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]twt info exit %d\n", ret);
|
return ret;
|
}
|
|
ret = dbcc_info_exit(adapter);
|
if (ret != MACSUCCESS) {
|
PLTFM_MSG_ERR("[ERR]dbcc info exit %d\n", ret);
|
return ret;
|
}
|
|
for (band_idx = 0; band_idx < MAC_AX_BAND_NUM; band_idx++) {
|
scan_list = adapter->scanofld_info.list[band_idx];
|
if (scan_list) {
|
mac_scanofld_ch_list_clear(adapter, scan_list);
|
PLTFM_FREE((u8 *)scan_list,
|
sizeof(struct scan_chinfo_list));
|
adapter->scanofld_info.list[band_idx] = NULL;
|
}
|
}
|
|
PLTFM_FREE(adapter->hw_info, sizeof(struct mac_ax_hw_info));
|
|
priv_size = get_mac_ax_priv_size();
|
PLTFM_FREE(adapter, sizeof(struct mac_ax_adapter) + priv_size);
|
return MACSUCCESS;
|
}
|
|
u32 is_chip_id(struct mac_ax_adapter *adapter, enum mac_ax_chip_id id)
|
{
|
return (id == adapter->hw_info->chip_id ? 1 : 0);
|
}
|
|
u32 is_cv(struct mac_ax_adapter *adapter, enum rtw_cv cv)
|
{
|
return (cv == adapter->hw_info->cv ? 1 : 0);
|
}
|
|
u32 xlat_chip_id(u8 hw_id, u8 *chip_id)
|
{
|
switch (hw_id) {
|
#if MAC_AX_8852A_SUPPORT
|
case CHIP_ID_HW_DEF_8852A:
|
*chip_id = MAC_AX_CHIP_ID_8852A;
|
break;
|
#endif
|
#if MAC_AX_8852B_SUPPORT
|
case CHIP_ID_HW_DEF_8852B:
|
*chip_id = MAC_AX_CHIP_ID_8852B;
|
break;
|
#endif
|
#if MAC_AX_8852C_SUPPORT
|
case CHIP_ID_HW_DEF_8852C:
|
*chip_id = MAC_AX_CHIP_ID_8852C;
|
break;
|
#endif
|
#if MAC_AX_8192XB_SUPPORT
|
case CHIP_ID_HW_DEF_8192XB:
|
*chip_id = MAC_AX_CHIP_ID_8192XB;
|
break;
|
#endif
|
#if MAC_AX_8851B_SUPPORT
|
case CHIP_ID_HW_DEF_8851B:
|
*chip_id = MAC_AX_CHIP_ID_8851B;
|
break;
|
#endif
|
#if MAC_AX_8851E_SUPPORT
|
case CHIP_ID_HW_DEF_8851E:
|
*chip_id = MAC_AX_CHIP_ID_8851E;
|
break;
|
#endif
|
#if MAC_AX_8852D_SUPPORT
|
case CHIP_ID_HW_DEF_8852D:
|
*chip_id = MAC_AX_CHIP_ID_8852D;
|
break;
|
#endif
|
#if MAC_AX_8852BT_SUPPORT
|
case CHIP_ID_HW_DEF_8852BT:
|
*chip_id = MAC_AX_CHIP_ID_8852BT;
|
break;
|
#endif
|
default:
|
*chip_id = MAC_AX_CHIP_ID_INVALID;
|
return MACCHIPID;
|
}
|
|
return MACSUCCESS;
|
}
|
