/** @file */
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/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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******************************************************************************/
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#ifndef _MAC_AX_STATE_MACH_H_
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#define _MAC_AX_STATE_MACH_H_
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/**
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* @struct mac_ax_state_mach
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* @brief mac_ax_state_mach
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*
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* @var mac_ax_state_mach::pwr
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* Please Place Description here.
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* @var mac_ax_state_mach::fwdl
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* Please Place Description here.
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* @var mac_ax_state_mach::efuse
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* Please Place Description here.
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* @var mac_ax_state_mach::read_request
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* Please Place Description here.
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* @var mac_ax_state_mach::write_request
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* Please Place Description here.
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* @var mac_ax_state_mach::conf_request
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* Please Place Description here.
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* @var mac_ax_state_mach::write_h2c
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* Please Place Description here.
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* @var mac_ax_state_mach::conf_h2c
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* Please Place Description here.
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* @var mac_ax_state_mach::read_h2c
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* Please Place Description here.
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* @var mac_ax_state_mach::pkt_ofld
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* Please Place Description here.
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* @var mac_ax_state_mach::efuse_ofld
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* Please Place Description here.
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* @var mac_ax_state_mach::macid_pause
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* Please Place Description here.
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* @var mac_ax_state_mach::mcc_group
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* Please Place Description here.
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* @var mac_ax_state_mach::mcc_request
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* Please Place Description here.
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* @var mac_ax_state_mach::fw_rst
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* Please Place Description here.
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* @var mac_ax_state_mach::aoac_rpt
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* Please Place Description here.
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*/
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/**
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* @struct mac_ax_state_mach
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* @brief mac_ax_state_mach
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*
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* @var mac_ax_state_mach::pwr
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* Please Place Description here.
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* @var mac_ax_state_mach::fwdl
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* Please Place Description here.
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* @var mac_ax_state_mach::efuse
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* Please Place Description here.
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* @var mac_ax_state_mach::read_request
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* Please Place Description here.
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* @var mac_ax_state_mach::write_request
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* Please Place Description here.
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* @var mac_ax_state_mach::conf_request
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* Please Place Description here.
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* @var mac_ax_state_mach::write_h2c
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* Please Place Description here.
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* @var mac_ax_state_mach::conf_h2c
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* Please Place Description here.
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* @var mac_ax_state_mach::read_h2c
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* Please Place Description here.
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* @var mac_ax_state_mach::pkt_ofld
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* Please Place Description here.
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* @var mac_ax_state_mach::efuse_ofld
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* Please Place Description here.
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* @var mac_ax_state_mach::macid_pause
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* Please Place Description here.
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* @var mac_ax_state_mach::mcc_group
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* Please Place Description here.
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* @var mac_ax_state_mach::mcc_request
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* Please Place Description here.
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* @var mac_ax_state_mach::fw_rst
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* Please Place Description here.
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* @var mac_ax_state_mach::aoac_rpt
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* Please Place Description here.
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* @var mac_ax_state_mach::p2p_stat
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* Please Place Description here.
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* @var mac_ax_state_mach::nan_stat
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* Please Place Description here.
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*/
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struct mac_ax_state_mach {
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#define MAC_AX_PWR_OFF 0
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#define MAC_AX_PWR_ON 1
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#define MAC_AX_PWR_PRE_OFF 2
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#define MAC_AX_PWR_ERR 3
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u8 pwr;
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#define MAC_AX_FWDL_IDLE 0
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#define MAC_AX_FWDL_CPU_ON 1
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#define MAC_AX_FWDL_H2C_PATH_RDY 2
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#define MAC_AX_FWDL_PATH_RDY 3
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#define MAC_AX_FWDL_INIT_RDY 4
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u8 fwdl;
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#define MAC_AX_EFUSE_IDLE 0
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#define MAC_AX_EFUSE_PHY 1
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#define MAC_AX_EFUSE_LOG_MAP 2
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#define MAC_AX_EFUSE_LOG_MASK 3
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#define MAC_AX_EFUSE_MAX 4
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u8 efuse;
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#define MAC_AX_OFLD_REQ_IDLE 0
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#define MAC_AX_OFLD_REQ_H2C_SENT 1
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#define MAC_AX_OFLD_REQ_CREATED 2
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#define MAC_AX_OFLD_REQ_CLEANED 3
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u8 read_request;
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u8 write_request;
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u8 conf_request;
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#define MAC_AX_CMD_OFLD_IDLE 0
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#define MAC_AX_CMD_OFLD_PROC 1
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#define MAC_AX_CMD_OFLD_SENDING 2
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#define MAC_AX_CMD_OFLD_RCVD 3
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u8 cmd_state;
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#define MAC_AX_OFLD_H2C_IDLE 0
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#define MAC_AX_OFLD_H2C_SENDING 1
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#define MAC_AX_OFLD_H2C_RCVD 2
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#define MAC_AX_OFLD_H2C_ERROR 4
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u8 write_h2c;
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u8 conf_h2c;
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#define MAC_AX_OFLD_H2C_DONE 3
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u8 read_h2c;
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u8 pkt_ofld;
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u8 efuse_ofld;
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u8 macid_pause;
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u8 disable_rf;
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u8 sch_tx_en_ofld;
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#define MAC_AX_MCC_EMPTY 0
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#define MAC_AX_MCC_STATE_H2C_SENT 1
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#define MAC_AX_MCC_STATE_H2C_RCVD 2
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#define MAC_AX_MCC_ADD_DONE 3
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#define MAC_AX_MCC_START_DONE 4
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#define MAC_AX_MCC_STOP_DONE 5
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#define MAC_AX_MCC_STATE_ERROR 6
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u8 mcc_group[4];
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u8 mcc_group_state[4];
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#define MAC_AX_MCC_REQ_IDLE 0
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#define MAC_AX_MCC_REQ_H2C_SENT 1
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#define MAC_AX_MCC_REQ_H2C_RCVD 2
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#define MAC_AX_MCC_REQ_DONE 3
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#define MAC_AX_MCC_REQ_FAIL 4
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u8 mcc_request[4];
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u8 mcc_request_state[4];
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#define MAC_AX_FW_RESET_IDLE 0
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#define MAC_AX_FW_RESET_RECV 1
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#define MAC_AX_FW_RESET_RECV_DONE 2
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#define MAC_AX_FW_RESET_PROCESS 3
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u8 fw_rst;
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#define MAC_AX_AOAC_RPT_IDLE 0
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#define MAC_AX_AOAC_RPT_H2C_SENDING 1
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#define MAC_AX_AOAC_RPT_H2C_RCVD 2
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#define MAC_AX_AOAC_RPT_H2C_DONE 3
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#define MAC_AX_AOAC_RPT_ERROR 4
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u8 aoac_rpt;
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#define MAC_AX_P2P_ACT_IDLE 0
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#define MAC_AX_P2P_ACT_BUSY 1
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#define MAC_AX_P2P_ACT_FAIL 2
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u8 p2p_stat;
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#define MAC_AX_FUNC_OFF 0
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#define MAC_AX_FUNC_ON 1
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u8 dmac_func;
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u8 cmac0_func;
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u8 cmac1_func;
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u8 bb0_func;
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u8 bb1_func;
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#define MAC_AX_WOW_STOPTRX_IDLE 0
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#define MAC_AX_WOW_STOPTRX_BUSY 1
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#define MAC_AX_WOW_STOPTRX_FAIL 2
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u8 wow_stoptrx_stat;
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#define MAC_AX_MAC_NOT_RDY 0
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#define MAC_AX_MAC_RDY 1
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#define MAC_AX_MAC_INIT_ERR 2
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#define MAC_AX_MAC_DEINIT_ERR 3
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#define MAC_AX_MAC_FINIT_ERR 4
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#define MAC_AX_MAC_FDEINIT_ERR 5
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u8 mac_rdy;
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#define MAC_AX_ROLE_ALOC_SUCC 0
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#define MAC_AX_ROLE_INIT_SUCC 1
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#define MAC_AX_ROLE_HW_UPD_SUCC 2
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#define MAC_AX_ROLE_ALOC_FAIL 3
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#define MAC_AX_ROLE_INIT_FAIL 4
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#define MAC_AX_ROLE_HW_UPD_FAIL 5
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u8 role_stat;
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#define MAC_AX_PLAT_OFF 0
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#define MAC_AX_PLAT_ON 1
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u8 plat;
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#define MAC_AX_IO_ST_NORM 0
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#define MAC_AX_IO_ST_HANG 1
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u8 io_st;
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#define MAC_AX_L2_DIS 0
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#define MAC_AX_L2_EN 1
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#define MAC_AX_L2_TRIG 2
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u8 l2_st;
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#define MAC_AX_SER_CTRL_SRT 0
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#define MAC_AX_SER_CTRL_STOP 1
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#define MAC_AX_SER_CTRL_ERR 2
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u8 ser_ctrl_st;
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#define MAC_AX_CH_SWITCH_GET_RPT 4
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u8 ch_switch;
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#define MAC_AX_PROXY_IDLE 0
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#define MAC_AX_PROXY_SENDING 1
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#define MAC_AX_PROXY_BUSY 2
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u8 proxy_st;
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u8 proxy_ret;
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u8 sensing_csi_st;
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#define MAC_AX_SENSING_CSI_IDLE 0
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#define MAC_AX_SENSING_CSI_SENDING 1
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#define MAC_AX_NAN_IDLE 0
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#define MAX_AX_NAN_ACT_H2C_FAIL 1
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#define MAX_AX_NAN_ACT_H2C_DONE 2
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u8 nan_stat;
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#define MAC_AX_STA_CSA_IDLE 0
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#define MAC_AX_STA_CSA_SENDING 1
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#define MAC_AX_STA_CSA_BUSY 2
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u8 sta_csa_st;
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u8 sta_csa_ret;
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#define MAC_AX_H2C_C2H_MON_OFF 0
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#define MAC_AX_H2C_C2H_MON_ON 1
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u8 h2c_c2h_mon;
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};
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#define MAC_AX_DFLT_SM \
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{MAC_AX_PWR_OFF, MAC_AX_FWDL_IDLE, MAC_AX_EFUSE_IDLE, \
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MAC_AX_OFLD_REQ_IDLE, MAC_AX_OFLD_REQ_IDLE, MAC_AX_OFLD_REQ_IDLE, \
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MAC_AX_CMD_OFLD_IDLE, MAC_AX_OFLD_H2C_IDLE, MAC_AX_OFLD_H2C_IDLE, \
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MAC_AX_OFLD_H2C_IDLE, MAC_AX_OFLD_H2C_IDLE, MAC_AX_OFLD_H2C_IDLE, \
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MAC_AX_OFLD_H2C_IDLE, MAC_AX_OFLD_H2C_IDLE, MAC_AX_OFLD_H2C_IDLE, \
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{MAC_AX_MCC_EMPTY}, {MAC_AX_MCC_EMPTY}, {MAC_AX_MCC_REQ_IDLE}, \
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{MAC_AX_MCC_REQ_IDLE}, MAC_AX_FW_RESET_IDLE, MAC_AX_AOAC_RPT_IDLE, \
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MAC_AX_P2P_ACT_IDLE, MAC_AX_FUNC_OFF, MAC_AX_FUNC_OFF, \
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MAC_AX_FUNC_OFF, MAC_AX_FUNC_OFF, MAC_AX_FUNC_OFF, \
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MAC_AX_WOW_STOPTRX_IDLE, MAC_AX_MAC_NOT_RDY, MAC_AX_ROLE_ALOC_SUCC, \
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MAC_AX_PLAT_OFF, MAC_AX_IO_ST_NORM, MAC_AX_L2_EN, MAC_AX_SER_CTRL_SRT,\
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MAC_AX_OFLD_H2C_IDLE, MAC_AX_PROXY_IDLE, MAC_AX_PROXY_IDLE, MAC_AX_SENSING_CSI_IDLE,\
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MAC_AX_NAN_IDLE, MAC_AX_STA_CSA_IDLE, MAC_AX_STA_CSA_IDLE, MAC_AX_H2C_C2H_MON_OFF}
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#endif
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