/******************************************************************************
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*
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* Copyright(c) 2019 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#define _HAL_EXT_TX_PWR_LMT_C_
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#include "hal_headers.h"
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enum rtw_hal_status
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rtw_hal_set_power_limit(void *hal, u8 band_idx)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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enum rtw_hal_status status = RTW_HAL_STATUS_SUCCESS;
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enum phl_phy_idx phy_idx = HW_PHY_0;
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if (band_idx == 1) {
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if (hal_info->hal_com->dbcc_en) {
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phy_idx = HW_PHY_1;
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} else {
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PHL_WARN("%s: band_idx(%d) dbcc_en(%d)\n", __func__,
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band_idx, hal_info->hal_com->dbcc_en);
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return status;
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}
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}
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status = rtw_hal_rf_set_power(hal_info, phy_idx, (PWR_LIMIT | PWR_LIMIT_RU));
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return status;
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}
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s8 rtw_hal_get_power_limit(void *hal, enum phl_phy_idx phy,
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u16 rate, u8 bandwidth, u8 beamforming, u8 tx_num, u8 channel)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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return rtw_hal_rf_get_power_limit(hal_info, phy, rate, bandwidth,
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beamforming, tx_num, channel);
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}
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bool
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rtw_hal_get_ext_pwr_lmt_en(void *hal,
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u8 hw_band)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct rtw_hal_com_t *hal_com = hal_info->hal_com;
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struct rtw_tpu_info *tpu = &(hal_com->band[hw_band].rtw_tpu_i);
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PHL_INFO("%s: hw_band(%d), en(%d)\n", __func__, hw_band, tpu->ext_pwr_lmt_en);
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return tpu->ext_pwr_lmt_en;
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}
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void
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rtw_hal_set_ext_pwr_lmt_en(void *hal,
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u8 hw_band, bool enable)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct rtw_hal_com_t *hal_com = hal_info->hal_com;
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struct rtw_tpu_info *tpu = &(hal_com->band[hw_band].rtw_tpu_i);
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PHL_INFO("%s: hw_band(%d), en(%d)\n", __func__, hw_band, enable);
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tpu->ext_pwr_lmt_en = enable;
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}
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void
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rtw_hal_enable_ext_pwr_lmt(void *hal, u8 hw_band,
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struct rtw_phl_ext_pwr_lmt_info *ext_pwr_lmt_info)
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{
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struct hal_info_t *hal_info = (struct hal_info_t *)hal;
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struct rtw_hal_com_t *hal_com = hal_info->hal_com;
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struct rtw_tpu_info *tpu = &(hal_com->band[hw_band].rtw_tpu_i);
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enum phl_phy_idx phy_idx = HW_PHY_0;
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PHL_INFO("%s\n", __func__);
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if (hw_band == 1)
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phy_idx = HW_PHY_1;
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/* Fill external tx power limit into hal_com->band[hw_band].rtw_tpu_i.ext_pwr_lmt_i */
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_os_mem_cpy(hal_com->drv_priv, &(tpu->ext_pwr_lmt_i),
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ext_pwr_lmt_info, sizeof(struct rtw_phl_ext_pwr_lmt_info));
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/**
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* Update extension(or external) tx power limit to corresponding field of halrf power limit table (as below)
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* 2g=> rf->pwr_info.tx_pwr_limit_2g[PW_LMT_REGU_EXT_PWR][bw][rate][bf][ch][tx_num]
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* 5g=> rf->pwr_info.tx_pwr_limit_5g[PW_LMT_REGU_EXT_PWR][bw][rate][bf][ch][tx_num]
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* 6g=> rf->pwr_info.tx_pwr_limit_6g[PW_LMT_REGU_EXT_PWR][bw][rate][bf][ch][tx_num]
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*/
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rtw_hal_rf_update_ext_pwr_lmt_table(hal_info, phy_idx);
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/* enable external tx power limit mechanism */
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tpu->ext_pwr_lmt_en = true;
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}
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