/******************************************************************************
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*
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* Copyright(c) 2007 - 2023 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*****************************************************************************/
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#ifndef _RTW_XMIT_H_
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#define _RTW_XMIT_H_
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#if 0 /*CONFIG_CORE_XMITBUF*/
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#ifdef CONFIG_PCI_HCI
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#define XMITBUF_ALIGN_SZ 4
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#else
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#ifdef USB_XMITBUF_ALIGN_SZ
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#define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ)
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#else
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#define XMITBUF_ALIGN_SZ 512
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#endif
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#endif
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#define MAX_CMDBUF_SZ (5120) /* (4096) */
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#endif
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#define MAX_BEACON_LEN 512
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#define MAX_NUMBLKS (1)
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#define XMIT_VO_QUEUE (0)
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#define XMIT_VI_QUEUE (1)
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#define XMIT_BE_QUEUE (2)
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#define XMIT_BK_QUEUE (3)
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#define VO_QUEUE_INX 0
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#define VI_QUEUE_INX 1
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#define BE_QUEUE_INX 2
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#define BK_QUEUE_INX 3
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#define BCN_QUEUE_INX 4
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#define MGT_QUEUE_INX 5
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#define HIGH_QUEUE_INX 6
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#define TXCMD_QUEUE_INX 7
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#define HW_QUEUE_ENTRY 8
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#ifdef RTW_PHL_TX
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#ifndef RTW_MAX_FRAG_NUM
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#define RTW_MAX_FRAG_NUM 10 //max scatter number of a packet to xmit
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#endif /*RTW_MAX_FRAG_NUM*/
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#define RTW_MAX_WL_HEAD 100
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#define RTW_MAX_WL_TAIL 100
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#define RTW_SZ_LLC (SNAP_SIZE + sizeof(u16))
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#define RTW_SZ_FCS 4
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#endif
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#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
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do {\
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dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : (dot11txpn.val + 1);\
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pattrib_iv[0] = dot11txpn._byte_.TSC0;\
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pattrib_iv[1] = dot11txpn._byte_.TSC1;\
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pattrib_iv[2] = dot11txpn._byte_.TSC2;\
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pattrib_iv[3] = ((keyidx & 0x3)<<6);\
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} while (0)
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#define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\
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do {\
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dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\
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pattrib_iv[0] = dot11txpn._byte_.TSC1;\
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pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\
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pattrib_iv[2] = dot11txpn._byte_.TSC0;\
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pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\
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pattrib_iv[4] = dot11txpn._byte_.TSC2;\
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pattrib_iv[5] = dot11txpn._byte_.TSC3;\
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pattrib_iv[6] = dot11txpn._byte_.TSC4;\
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pattrib_iv[7] = dot11txpn._byte_.TSC5;\
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} while (0)
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#define AES_IV(pattrib_iv, dot11txpn, keyidx)\
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do {\
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dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\
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pattrib_iv[0] = dot11txpn._byte_.TSC0;\
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pattrib_iv[1] = dot11txpn._byte_.TSC1;\
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pattrib_iv[2] = 0;\
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pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\
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pattrib_iv[4] = dot11txpn._byte_.TSC2;\
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pattrib_iv[5] = dot11txpn._byte_.TSC3;\
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pattrib_iv[6] = dot11txpn._byte_.TSC4;\
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pattrib_iv[7] = dot11txpn._byte_.TSC5;\
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} while (0)
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#define GCMP_IV(a, b, c) AES_IV(a, b, c)
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/* Check if AMPDU Tx is supported or not. If it is supported,
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* it need to check "amsdu in ampdu" is supported or not.
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* (ampdu_en, amsdu_ampdu_en) =
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* (0, x) : AMPDU is not enable, but AMSDU is valid to send.
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* (1, 0) : AMPDU is enable, AMSDU in AMPDU is not enable. So, AMSDU is not valid to send.
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* (1, 1) : AMPDU and AMSDU in AMPDU are enable. So, AMSDU is valid to send.
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*/
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#define IS_AMSDU_AMPDU_NOT_VALID(pattrib)\
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((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE))
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#define IS_AMSDU_AMPDU_VALID(pattrib)\
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!((pattrib->ampdu_en == _TRUE) && (pattrib->amsdu_ampdu_en == _FALSE))
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#define HWXMIT_ENTRY 4
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/* For Buffer Descriptor ring architecture */
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#if defined(BUF_DESC_ARCH) || defined(CONFIG_TRX_BD_ARCH)
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#define TX_BUFFER_SEG_NUM 1 /* 0:2 seg, 1: 4 seg, 2: 8 seg. */
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#endif
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/*GEORGIA_TODO_FIXIT_MOVE_TO_HAL*/
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#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)
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#define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8822B */
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#elif defined(CONFIG_RTL8821C)
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#define TXDESC_SIZE 48 /* HALMAC_TX_DESC_SIZE_8821C */
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#elif defined(CONFIG_RTL8814B)
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#define TXDESC_SIZE (16 + 32)
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#else
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#define TXDESC_SIZE 32 /* old IC (ex: 8188E) */
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#endif
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#ifdef CONFIG_TX_EARLY_MODE
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#define EARLY_MODE_INFO_SIZE 8
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#endif
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#ifdef CONFIG_USB_HCI
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#ifdef USB_PACKET_OFFSET_SZ
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#define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ)
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#else
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#define PACKET_OFFSET_SZ (8)
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#endif
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#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
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#endif
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#ifdef CONFIG_PCI_HCI
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#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8822C) || defined(CONFIG_TRX_BD_ARCH)
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/* this section is defined for buffer descriptor ring architecture */
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#define TX_WIFI_INFO_SIZE (TXDESC_SIZE) /* it may add 802.11 hdr or others... */
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/* tx desc and payload are in the same buf */
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#define TXDESC_OFFSET (TX_WIFI_INFO_SIZE)
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#else
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/* tx desc and payload are NOT in the same buf */
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#define TXDESC_OFFSET (0)
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/* 8188ee/8723be/8812ae/8821ae has extra PCI DMA info in tx desc */
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#endif
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#endif /* CONFIG_PCI_HCI */
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#ifdef RTW_PHL_TX
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#ifdef TXDESC_OFFSET
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#undef TXDESC_OFFSET
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#endif
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#define TXDESC_OFFSET (0)
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#endif
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#ifdef RTW_PHL_TX
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enum CORE_TX_TYPE {
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RTW_TX_OS = 0,
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RTW_TX_OS_MAC80211,
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RTW_TX_DRV_MGMT,
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};
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#endif
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enum TXDESC_SC {
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SC_DONT_CARE = 0x00,
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SC_UPPER = 0x01,
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SC_LOWER = 0x02,
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SC_DUPLICATE = 0x03
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};
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#ifdef CONFIG_PCI_HCI
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#ifndef CONFIG_TRX_BD_ARCH /* CONFIG_TRX_BD_ARCH doesn't need this */
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#define TXDESC_64_BYTES
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#endif
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#endif
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/*GEORGIA_TODO_FIXIT_IC_DEPENDENCE*/
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#ifdef CONFIG_TRX_BD_ARCH
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struct tx_buf_desc {
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#ifdef CONFIG_64BIT_DMA
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#define TX_BUFFER_SEG_SIZE 4 /* in unit of DWORD */
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#else
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#define TX_BUFFER_SEG_SIZE 2 /* in unit of DWORD */
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#endif
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unsigned int dword[TX_BUFFER_SEG_SIZE * (2 << TX_BUFFER_SEG_NUM)];
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} __packed;
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#elif (defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8822C)) && defined(CONFIG_PCI_HCI) /* 8192ee or 8814ae */
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/* 8192EE_TODO */
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struct tx_desc {
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unsigned int txdw0;
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unsigned int txdw1;
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unsigned int txdw2;
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unsigned int txdw3;
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unsigned int txdw4;
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unsigned int txdw5;
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unsigned int txdw6;
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unsigned int txdw7;
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};
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#else
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struct tx_desc {
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unsigned int txdw0;
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unsigned int txdw1;
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unsigned int txdw2;
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unsigned int txdw3;
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unsigned int txdw4;
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unsigned int txdw5;
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unsigned int txdw6;
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unsigned int txdw7;
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#if defined(TXDESC_40_BYTES) || defined(TXDESC_64_BYTES)
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unsigned int txdw8;
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unsigned int txdw9;
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#endif /* TXDESC_40_BYTES */
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#ifdef TXDESC_64_BYTES
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unsigned int txdw10;
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unsigned int txdw11;
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/* 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor */
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/* size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute */
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/* memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor */
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/* number or enlarge descriptor size as 64 bytes. */
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unsigned int txdw12;
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unsigned int txdw13;
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unsigned int txdw14;
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unsigned int txdw15;
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#endif
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};
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#endif
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#ifndef CONFIG_TRX_BD_ARCH
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union txdesc {
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struct tx_desc txdesc;
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unsigned int value[TXDESC_SIZE >> 2];
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};
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#endif
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#ifdef CONFIG_PCI_HCI
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#define PCI_MAX_TX_QUEUE_COUNT 8 /* == HW_QUEUE_ENTRY */
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struct rtw_tx_ring {
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unsigned char qid;
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#ifdef CONFIG_TRX_BD_ARCH
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struct tx_buf_desc *buf_desc;
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#else
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struct tx_desc *desc;
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#endif
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dma_addr_t dma;
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unsigned int idx;
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unsigned int entries;
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_queue queue;
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u32 qlen;
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#ifdef CONFIG_TRX_BD_ARCH
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u16 hw_rp_cache;
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#endif
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};
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#ifdef DBG_TXBD_DESC_DUMP
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#define TX_BAK_FRMAE_CNT 10
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#define TX_BAK_DESC_LEN 48 /* byte */
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#define TX_BAK_DATA_LEN 30 /* byte */
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struct rtw_tx_desc_backup {
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int tx_bak_rp;
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int tx_bak_wp;
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u8 tx_bak_desc[TX_BAK_DESC_LEN];
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u8 tx_bak_data_hdr[TX_BAK_DATA_LEN];
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u8 tx_desc_size;
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};
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#endif
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#endif
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struct hw_xmit {
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/* _lock xmit_lock; */
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/* _list pending; */
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_queue *sta_queue;
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/* struct hw_txqueue *phwtxqueue; */
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/* sint txcmdcnt; */
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int accnt;
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};
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#if 1 //def RTW_PHL_TX
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struct pkt_attrib {
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//updated by rtw_core_update_xmitframe
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u32 sz_payload_per_frag;
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u32 sz_wlan_head;
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u32 sz_wlan_tail;
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u32 sz_phl_head;
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u32 sz_phl_tail;
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u8 nr_frags;
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u32 frag_len;
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u32 frag_datalen;
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#ifdef CONFIG_CORE_TXSC
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u32 frag_len_txsc;
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#endif
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//updated by
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u16 ether_type;
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u8 src[ETH_ALEN];
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u8 dst[ETH_ALEN];
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u8 ta[ETH_ALEN];
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u8 ra[ETH_ALEN];
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u16 pkt_hdrlen; /* the original 802.3 pkt header len */
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u32 sz_payload;
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u8 dhcp_pkt;
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u8 icmp_pkt;
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u8 hipriority_pkt; /* high priority packet */
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//WLAN HDR
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u16 hdrlen; /* the WLAN Header Len */
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u8 type;
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u8 subtype;
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u8 qos_en;
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u16 seqnum;
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u8 ampdu_en;/* tx ampdu enable */
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u8 ack_policy;
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u8 amsdu;
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u8 mdata;/* more data bit */
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u8 eosp;
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u8 priority;
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//Security
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u8 bswenc;
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/*
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* encrypt
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* indicate the encrypt algorithm, ref: enum security_type.
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* 0: indicate no encrypt.
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*/
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u8 encrypt;
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u8 iv_len;
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u8 icv_len;
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u8 iv[18];
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u8 icv[16];
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u8 key_idx;
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union Keytype dot11tkiptxmickey;
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/* union Keytype dot11tkiprxmickey; */
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union Keytype dot118021x_UncstKey;
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//updated by rtw_core_update_xmitframe
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u8 hw_ssn_sel; /* for HW_SEQ0,1,2,3 */
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u32 pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */
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u32 last_txcmdsz;
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#if defined(CONFIG_CONCURRENT_MODE)
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u8 bmc_camid;
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#endif
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u8 mac_id;
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u8 vcs_mode; /* virtual carrier sense method */
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#ifdef CONFIG_RTW_WDS
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u8 wds;
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#endif
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#ifdef CONFIG_RTW_MESH
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u8 mda[ETH_ALEN]; /* mesh da */
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u8 msa[ETH_ALEN]; /* mesh sa */
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u8 meshctrl_len; /* Length of Mesh Control field */
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u8 mesh_frame_mode;
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#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
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u8 mb2u;
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#endif
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u8 mfwd_ttl;
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u32 mseq;
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#endif
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#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
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u8 hw_csum;
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#endif
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u8 ht_en;
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u8 raid;/* rate adpative id */
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u8 bwmode;
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u8 ch_offset;/* PRIME_CHNL_OFFSET */
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u8 sgi;/* short GI */
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u8 ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */
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u8 amsdu_ampdu_en;/* tx amsdu in ampdu enable */
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#ifdef CONFIG_TX_AMSDU
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u8 tx_amsdu_en;/* tx amsdu enable */
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#endif
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u8 pctrl;/* per packet txdesc control enable */
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u8 triggered;/* for ap mode handling Power Saving sta */
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/*u8 qsel;*/
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u8 order;/* order bit */
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u8 rate;
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u8 intel_proxim;
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u8 retry_ctrl;
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u8 mbssid;
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u8 ldpc;
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u8 stbc;
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struct sta_info *psta;
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struct _ADAPTER_LINK *adapter_link;
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u8 rtsen;
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u8 cts2self;
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u8 hw_rts_en;
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#ifdef CONFIG_TDLS
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u8 direct_link;
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struct sta_info *ptdls_sta;
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#endif /* CONFIG_TDLS */
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u8 key_type;
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#ifdef CONFIG_BEAMFORMING
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u16 txbf_p_aid;/*beamforming Partial_AID*/
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u16 txbf_g_id;/*beamforming Group ID*/
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/*
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* 2'b00: Unicast NDPA
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* 2'b01: Broadcast NDPA
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* 2'b10: Beamforming Report Poll
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* 2'b11: Final Beamforming Report Poll
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*/
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u8 bf_pkt_type;
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#endif
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u8 wdinfo_en;/*FPGA_test*/
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u8 dma_ch;/*FPGA_test*/
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};
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#endif
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#if 0 //ndef RTW_PHL_TX
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/* reduce size */
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struct pkt_attrib {
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u8 type;
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u8 subtype;
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u8 bswenc;
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u8 dhcp_pkt;
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u16 ether_type;
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u16 seqnum;
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u8 hw_ssn_sel; /* for HW_SEQ0,1,2,3 */
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u16 pkt_hdrlen; /* the original 802.3 pkt header len */
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u16 hdrlen; /* the WLAN Header Len */
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u32 pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */
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u32 last_txcmdsz;
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u8 nr_frags;
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u8 encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */
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#if defined(CONFIG_CONCURRENT_MODE)
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u8 bmc_camid;
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#endif
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u8 iv_len;
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u8 icv_len;
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u8 iv[18];
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u8 icv[16];
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u8 priority;
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u8 ack_policy;
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u8 mac_id;
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u8 vcs_mode; /* virtual carrier sense method */
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u8 dst[ETH_ALEN];
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u8 src[ETH_ALEN];
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u8 ta[ETH_ALEN];
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u8 ra[ETH_ALEN];
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#ifdef CONFIG_RTW_MESH
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u8 mda[ETH_ALEN]; /* mesh da */
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u8 msa[ETH_ALEN]; /* mesh sa */
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u8 meshctrl_len; /* Length of Mesh Control field */
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u8 mesh_frame_mode;
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#if CONFIG_RTW_MESH_DATA_BMC_TO_UC
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u8 mb2u;
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#endif
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u8 mfwd_ttl;
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u32 mseq;
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#endif
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#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
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u8 hw_csum;
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#endif
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u8 key_idx;
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u8 qos_en;
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u8 ht_en;
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u8 raid;/* rate adpative id */
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u8 bwmode;
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u8 ch_offset;/* PRIME_CHNL_OFFSET */
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u8 sgi;/* short GI */
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u8 ampdu_en;/* tx ampdu enable */
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u8 ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */
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u8 amsdu;
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u8 amsdu_ampdu_en;/* tx amsdu in ampdu enable */
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u8 mdata;/* more data bit */
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u8 pctrl;/* per packet txdesc control enable */
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u8 triggered;/* for ap mode handling Power Saving sta */
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u8 qsel;
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u8 order;/* order bit */
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u8 eosp;
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u8 rate;
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u8 intel_proxim;
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u8 retry_ctrl;
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u8 mbssid;
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u8 ldpc;
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u8 stbc;
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struct sta_info *psta;
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u8 rtsen;
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u8 cts2self;
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union Keytype dot11tkiptxmickey;
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/* union Keytype dot11tkiprxmickey; */
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union Keytype dot118021x_UncstKey;
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#ifdef CONFIG_TDLS
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u8 direct_link;
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struct sta_info *ptdls_sta;
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#endif /* CONFIG_TDLS */
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u8 key_type;
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u8 icmp_pkt;
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u8 hipriority_pkt; /* high priority packet */
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#ifdef CONFIG_BEAMFORMING
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u16 txbf_p_aid;/*beamforming Partial_AID*/
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u16 txbf_g_id;/*beamforming Group ID*/
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/*
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* 2'b00: Unicast NDPA
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* 2'b01: Broadcast NDPA
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* 2'b10: Beamforming Report Poll
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* 2'b11: Final Beamforming Report Poll
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*/
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u8 bf_pkt_type;
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#endif
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u8 wdinfo_en;/*FPGA_test*/
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u8 dma_ch;/*FPGA_test*/
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};
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#endif
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#ifdef CONFIG_RTW_WDS
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#define XATTRIB_GET_WDS(xattrib) ((xattrib)->wds)
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#else
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#define XATTRIB_GET_WDS(xattrib) 0
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#endif
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#ifdef CONFIG_RTW_MESH
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#define XATTRIB_GET_MCTRL_LEN(xattrib) ((xattrib)->meshctrl_len)
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#else
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#define XATTRIB_GET_MCTRL_LEN(xattrib) 0
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#endif
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#ifdef CONFIG_TX_AMSDU
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enum {
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RTW_AMSDU_TIMER_UNSET = 0,
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RTW_AMSDU_TIMER_SETTING,
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RTW_AMSDU_TIMER_TIMEOUT,
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};
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#endif
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#define WLANHDR_OFFSET 64
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#define NULL_FRAMETAG (0x0)
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#define DATA_FRAMETAG 0x01
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#define L2_FRAMETAG 0x02
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#define MGNT_FRAMETAG 0x03
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#define AMSDU_FRAMETAG 0x04
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#define EII_FRAMETAG 0x05
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#define IEEE8023_FRAMETAG 0x06
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#define MP_FRAMETAG 0x07
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#define TXAGG_FRAMETAG 0x08
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|
enum {
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XMITBUF_DATA = 0,
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XMITBUF_MGNT = 1,
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XMITBUF_CMD = 2,
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};
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|
bool rtw_xmit_ac_blocked(_adapter *adapter);
|
|
struct submit_ctx {
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systime submit_time; /* */
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u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */
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int status; /* status for operation */
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void *rsp; /* rsp buffer allocated by handler */
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_completion done;
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};
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enum {
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RTW_SCTX_SUBMITTED = -1,
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RTW_SCTX_DONE_SUCCESS = 0,
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RTW_SCTX_DONE_UNKNOWN,
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RTW_SCTX_DONE_TIMEOUT,
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RTW_SCTX_DONE_BUF_ALLOC,
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RTW_SCTX_DONE_BUF_FREE,
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RTW_SCTX_DONE_WRITE_PORT_ERR,
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RTW_SCTX_DONE_TX_DESC_NA,
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RTW_SCTX_DONE_TX_DENY,
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RTW_SCTX_DONE_CCX_PKT_FAIL,
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RTW_SCTX_DONE_DRV_STOP,
|
RTW_SCTX_DONE_DEV_REMOVE,
|
RTW_SCTX_DONE_CMD_ERROR,
|
RTW_SCTX_DONE_CMD_DROP,
|
RTX_SCTX_CSTR_WAIT_RPT2,
|
};
|
|
|
void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms);
|
int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg);
|
void rtw_sctx_done_err(struct submit_ctx **sctx, int status);
|
void rtw_sctx_done(struct submit_ctx **sctx);
|
|
#if 0 /*CONFIG_CORE_XMITBUF*/
|
struct xmit_buf {
|
_list list;
|
|
_adapter *padapter;
|
|
u8 *pallocated_buf;
|
|
u8 *pbuf;
|
|
void *priv_data;
|
|
u16 buf_tag; /* 0: Normal xmitbuf, 1: extension xmitbuf, 2:cmd xmitbuf */
|
u16 flags;
|
u32 alloc_sz;
|
|
u32 len;
|
|
struct submit_ctx *sctx;
|
|
#ifdef CONFIG_USB_HCI
|
|
/* u32 sz[8]; */
|
u32 ff_hwaddr;
|
u8 bulkout_id; /* for halmac */
|
|
PURB pxmit_urb[8];
|
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
|
|
u8 bpending[8];
|
|
sint last[8];
|
|
#endif
|
|
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
u8 *phead;
|
u8 *pdata;
|
u8 *ptail;
|
u8 *pend;
|
u32 ff_hwaddr;
|
u8 pg_num;
|
u8 agg_num;
|
#endif
|
|
#ifdef CONFIG_PCI_HCI
|
#ifdef CONFIG_TRX_BD_ARCH
|
/*struct tx_buf_desc *buf_desc;*/
|
#else
|
struct tx_desc *desc;
|
#endif
|
#endif
|
|
#if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT)
|
u8 no;
|
#endif
|
|
};
|
#endif
|
|
#ifdef CONFIG_CORE_TXSC
|
#define MAX_TXSC_SKB_NUM 6
|
#endif
|
|
struct xmit_txreq_buf {
|
_list list;
|
u8 *txreq;
|
u8 *head;
|
u8 *tail;
|
u8 *pkt_list;
|
#ifdef CONFIG_CORE_TXSC
|
u8 *pkt[MAX_TXSC_SKB_NUM];
|
u8 pkt_cnt;
|
_adapter *adapter;
|
u8 macid;
|
u8 txsc_id;
|
#endif
|
};
|
|
struct xmit_frame {
|
_list list;
|
|
struct pkt_attrib attrib;
|
|
u16 os_qid;
|
|
struct sk_buff *pkt;
|
|
int frame_tag;
|
|
_adapter *padapter;
|
|
/*Only for MGNT Frame*/
|
u8 *prealloc_buf_addr;
|
#ifdef CONFIG_USB_HCI
|
dma_addr_t dma_transfer_addr;
|
#endif
|
u8 *buf_addr;
|
#if 0 /*CONFIG_CORE_XMITBUF*/
|
struct xmit_buf *pxmitbuf;
|
#endif
|
|
#ifdef CONFIG_USB_HCI
|
#ifdef CONFIG_USB_TX_AGGREGATION
|
u8 agg_num;
|
#endif
|
s8 pkt_offset;
|
#endif
|
|
#ifdef CONFIG_XMIT_ACK
|
u8 ack_report;
|
#endif
|
|
u8 *alloc_addr; /* the actual address this xmitframe allocated */
|
u8 ext_tag; /* 0:data, 1:mgmt */
|
|
#ifdef RTW_PHL_TX
|
u8 xftype;
|
|
//struct sk_buff *skb;
|
//struct sta_info *psta;
|
//struct pkt_attrib tx_attrib;
|
|
u8 alloc_hdr;
|
u8 alloc_tail;
|
u8 *wlhdr[RTW_MAX_FRAG_NUM];
|
u8 *wltail[RTW_MAX_FRAG_NUM];
|
|
u32 txring_idx;
|
u32 txreq_cnt;
|
struct rtw_xmit_req *phl_txreq;
|
u32 txfree_cnt;
|
|
struct xmit_txreq_buf *ptxreq_buf;/* TXREQ_QMGT for recycle*/
|
|
u16 buf_need_free; /* size is realted to RTW_MAX_FRAG_NUM */
|
#endif
|
|
};
|
|
struct tx_servq {
|
_list tx_pending;
|
_queue sta_pending;
|
int qcnt;
|
};
|
|
|
struct sta_xmit_priv {
|
_lock lock;
|
sint option;
|
sint apsd_setting; /* When bit mask is on, the associated edca queue supports APSD. */
|
|
|
/* struct tx_servq blk_q[MAX_NUMBLKS]; */
|
struct tx_servq be_q; /* priority == 0,3 */
|
struct tx_servq bk_q; /* priority == 1,2 */
|
struct tx_servq vi_q; /* priority == 4,5 */
|
struct tx_servq vo_q; /* priority == 6,7 */
|
_list legacy_dz;
|
_list apsd;
|
|
u16 txseq_tid[16];
|
|
/* uint sta_tx_bytes; */
|
/* u64 sta_tx_pkts; */
|
/* uint sta_tx_fail; */
|
|
|
};
|
|
|
struct hw_txqueue {
|
volatile sint head;
|
volatile sint tail;
|
volatile sint free_sz; /* in units of 64 bytes */
|
volatile sint free_cmdsz;
|
volatile sint txsz[8];
|
uint ff_hwaddr;
|
uint cmd_hwaddr;
|
sint ac_tag;
|
};
|
|
struct agg_pkt_info {
|
u16 offset;
|
u16 pkt_len;
|
};
|
#if 0 /*CONFIG_CORE_XMITBUF*/
|
enum cmdbuf_type {
|
CMDBUF_BEACON = 0x00,
|
CMDBUF_RSVD,
|
CMDBUF_MAX
|
};
|
#endif
|
struct xmit_priv {
|
|
_lock lock;
|
#if 0 /*def CONFIG_XMIT_THREAD_MODE*/
|
_sema xmit_sema;
|
#endif
|
|
/* _queue blk_strms[MAX_NUMBLKS]; */
|
_queue be_pending;
|
_queue bk_pending;
|
_queue vi_pending;
|
_queue vo_pending;
|
_queue bm_pending;
|
|
/* _queue legacy_dz_queue; */
|
/* _queue apsd_queue; */
|
|
u8 *pallocated_frame_buf;
|
u8 *pxmit_frame_buf;
|
uint free_xmitframe_cnt;
|
_queue free_xmit_queue;
|
|
/* uint mapping_addr; */
|
/* uint pkt_sz; */
|
|
u8 *xframe_ext_alloc_addr;
|
u8 *xframe_ext;
|
uint free_xframe_ext_cnt;
|
_queue free_xframe_ext_queue;
|
|
/* MGT_TXREQ_QMGT */
|
u8 *xframe_ext_txreq_alloc_addr;
|
u8 *xframe_ext_txreq;
|
|
/* struct hw_txqueue be_txqueue; */
|
/* struct hw_txqueue bk_txqueue; */
|
/* struct hw_txqueue vi_txqueue; */
|
/* struct hw_txqueue vo_txqueue; */
|
/* struct hw_txqueue bmc_txqueue; */
|
|
uint frag_len;
|
|
_adapter *adapter;
|
|
u8 vcs_setting;
|
u8 vcs;
|
u8 vcs_type;
|
/* u16 rts_thresh; */
|
|
u64 tx_bytes;
|
u64 tx_pkts;
|
u64 tx_drop;
|
u64 last_tx_pkts;
|
|
struct hw_xmit *hwxmits;
|
u8 hwxmit_entry;
|
|
u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. */
|
|
#ifdef CONFIG_USB_HCI
|
_sema tx_retevt;/* all tx return event; */
|
u8 txirp_cnt;
|
|
_tasklet xmit_tasklet;
|
|
/* per AC pending irp */
|
int beq_cnt;
|
int bkq_cnt;
|
int viq_cnt;
|
int voq_cnt;
|
#endif
|
|
#ifdef PRIVATE_R
|
u64 tx_be_drop_cnt;
|
u64 tx_bk_drop_cnt;
|
u64 tx_vi_drop_cnt;
|
u64 tx_vo_drop_cnt;
|
#endif
|
|
#ifdef CONFIG_PCI_HCI
|
/* Tx */
|
struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT];
|
int txringcount[PCI_MAX_TX_QUEUE_COUNT];
|
u8 beaconDMAing; /* flag of indicating beacon is transmiting to HW by DMA */
|
#ifdef CONFIG_TX_AMSDU_SW_MODE
|
#ifdef CONFIG_RTW_TX_AMSDU_USE_WQ
|
_workitem_cpu xmit_workitem;
|
#else
|
_tasklet xmit_tasklet;
|
#endif
|
#endif
|
#endif
|
|
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
#ifdef CONFIG_TX_AMSDU_SW_MODE
|
_tasklet xmit_tasklet;
|
#endif
|
#endif /* CONFIG_SDIO_HCI */
|
|
#if 0 /*CONFIG_CORE_XMITBUF*/
|
_queue free_xmitbuf_queue;
|
_queue pending_xmitbuf_queue;
|
u8 *pallocated_xmitbuf;
|
u8 *pxmitbuf;
|
uint free_xmitbuf_cnt;
|
|
_queue free_xmit_extbuf_queue;
|
u8 *pallocated_xmit_extbuf;
|
u8 *pxmit_extbuf;
|
uint free_xmit_extbuf_cnt;
|
|
struct xmit_buf pcmd_xmitbuf[CMDBUF_MAX];
|
#endif
|
u8 hw_ssn_seq_no;/* mapping to REG_HW_SEQ 0,1,2,3 */
|
u16 nqos_ssn;
|
#ifdef CONFIG_TX_EARLY_MODE
|
|
#ifdef CONFIG_SDIO_HCI
|
#define MAX_AGG_PKT_NUM 20
|
#else
|
#define MAX_AGG_PKT_NUM 256 /* Max tx ampdu coounts */
|
#endif
|
|
struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM];
|
#endif
|
|
#ifdef CONFIG_XMIT_ACK
|
int ack_tx;
|
_mutex ack_tx_mutex;
|
struct submit_ctx ack_tx_ops;
|
u8 ack_tx_seq_no;
|
#ifdef CONFIG_XMIT_ACK_BY_REL_RPT
|
struct rtw_txfb_t ack_txfb;
|
#endif
|
#endif
|
|
#ifdef CONFIG_TX_AMSDU
|
_timer amsdu_vo_timer;
|
u8 amsdu_vo_timeout;
|
|
_timer amsdu_vi_timer;
|
u8 amsdu_vi_timeout;
|
|
_timer amsdu_be_timer;
|
u8 amsdu_be_timeout;
|
|
_timer amsdu_bk_timer;
|
u8 amsdu_bk_timeout;
|
|
u32 amsdu_debug_set_timer;
|
u32 amsdu_debug_timeout;
|
|
#ifndef AMSDU_DEBUG_MAX_COUNT
|
#define AMSDU_DEBUG_MAX_COUNT 5
|
#endif
|
u32 amsdu_debug_coalesce[AMSDU_DEBUG_MAX_COUNT];
|
u32 amsdu_debug_tasklet;
|
u32 amsdu_debug_enqueue;
|
u32 amsdu_debug_dequeue;
|
#endif
|
#ifdef DBG_TXBD_DESC_DUMP
|
BOOLEAN dump_txbd_desc;
|
#endif
|
#ifdef CONFIG_PCI_TX_POLLING
|
_timer tx_poll_timer;
|
#endif
|
#ifdef CONFIG_LAYER2_ROAMING
|
_queue rpkt_queue;
|
#endif
|
_lock lock_sctx;
|
#ifdef CONFIG_CORE_TXSC
|
_lock txsc_lock;
|
u8 txsc_enable;
|
u8 txsc_debug_mode;
|
u8 txsc_debug_mask;/* BIT0:core txsc(no use), BIT1: phl txsc enable, BIT2: debug_print */
|
|
struct sta_info *ptxsc_sta_cached;
|
|
/* for debug */
|
u32 txsc_phl_err_cnt1;
|
u32 txsc_phl_err_cnt2;
|
#endif /* CONFIG_CORE_TXSC */
|
};
|
|
#if 0 /*CONFIG_CORE_XMITBUF*/
|
extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv,
|
enum cmdbuf_type buf_type);
|
#define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD)
|
#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON)
|
|
extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv);
|
extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
|
extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv);
|
extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
#endif
|
enum rtw_data_rate _rate_mrate2phl(enum MGN_RATE mrate);
|
void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz);
|
extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len);
|
|
extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib);
|
extern s32 rtw_put_snap(u8 *data, u16 h_proto);
|
|
extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv, u16 os_qid);
|
struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv);
|
struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv);
|
extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe);
|
extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue);
|
s32 core_tx_free_xmitframe(_adapter *padapter, struct xmit_frame *pxframe);
|
struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac);
|
extern s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
|
extern struct xmit_frame *rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry);
|
|
extern s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe);
|
extern u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib);
|
#define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib)
|
extern s32 rtw_xmitframe_coalesce(_adapter *padapter, struct sk_buff *pkt,
|
struct xmit_frame *pxmitframe);
|
#if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH)
|
extern s32 rtw_mgmt_xmitframe_coalesce(_adapter *padapter,
|
struct sk_buff *pkt, struct xmit_frame *pxmitframe);
|
#endif
|
#ifdef CONFIG_TDLS
|
extern struct tdls_txmgmt *ptxmgmt;
|
s32 rtw_xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, struct tdls_txmgmt *ptxmgmt);
|
s32 update_tdls_attrib(_adapter *padapter, struct _ADAPTER_LINK *padapter_link, struct pkt_attrib *pattrib);
|
#endif
|
s32 _rtw_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag);
|
void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv);
|
|
|
s32 rtw_txframes_pending(_adapter *padapter);
|
s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib);
|
void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry);
|
|
|
s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter);
|
void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv);
|
|
u8 rtw_init_lite_xmit_resource(struct dvobj_priv *dvobj);
|
void rtw_free_lite_xmit_resource(struct dvobj_priv *dvobj);
|
|
void rtw_alloc_hwxmits(_adapter *padapter);
|
void rtw_free_hwxmits(_adapter *padapter);
|
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 24))
|
s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev);
|
#endif
|
s32 rtw_xmit_posthandle(_adapter *padapter, struct xmit_frame *pxmitframe, struct sk_buff *pkt);
|
s32 rtw_xmit(_adapter *padapter, struct sk_buff **pkt, u16 os_qid);
|
bool xmitframe_hiq_filter(struct xmit_frame *xmitframe);
|
#if defined(CONFIG_AP_MODE) || defined(CONFIG_TDLS)
|
sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe);
|
void stop_sta_xmit(_adapter *padapter, struct sta_info *psta);
|
void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta);
|
void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta);
|
#endif
|
|
#ifdef RTW_PHL_TX
|
s32 core_tx_prepare_phl(_adapter *padapter, struct xmit_frame *pxframe);
|
s32 core_tx_call_phl(_adapter *padapter, struct xmit_frame *pxframe, void *txsc_pkt);
|
s32 core_tx_per_packet(_adapter *padapter, struct xmit_frame *pxframe,
|
struct sk_buff **pskb, struct sta_info *psta);
|
s32 rtw_core_tx(_adapter *padapter, struct sk_buff **ppkt, struct sta_info *psta, u16 os_qid);
|
enum rtw_phl_status rtw_core_tx_recycle(void *drv_priv, struct rtw_xmit_req *txreq);
|
s32 core_tx_alloc_xmitframe(_adapter *padapter, struct xmit_frame **pxmitframe, u16 os_qid);
|
#ifdef CONFIG_PCI_HCI
|
struct tx_local_buf;
|
void rtw_os_query_local_buf(void *priv, struct tx_local_buf *buf);
|
void rtw_os_return_local_buf(void *priv, struct tx_local_buf *buf);
|
#endif
|
#ifdef CONFIG_CORE_TXSC
|
void core_recycle_txreq_phyaddr(_adapter *padapter, struct rtw_xmit_req *txreq);
|
s32 core_tx_free_xmitframe(_adapter *padapter, struct xmit_frame *pxframe);
|
u8 *get_txreq_buffer(_adapter *padapter, u8 **txreq, u8 **pkt_list, u8 **head, u8 **tail);
|
u8 tos_to_up(u8 tos);
|
#endif
|
#endif
|
|
void core_tx_amsdu_tasklet(unsigned long priv);
|
|
u8 rtw_get_tx_bw_mode(_adapter *adapter, struct sta_info *sta);
|
|
void rtw_update_tx_rate_bmp(struct dvobj_priv *dvobj);
|
u8 rtw_get_tx_bw_bmp_of_ht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw);
|
u8 rtw_get_tx_bw_bmp_of_vht_rate(struct dvobj_priv *dvobj, u8 rate, u8 max_bw);
|
s16 rtw_rfctl_get_oper_txpwr_max_mbm(struct rf_ctl_t *rfctl, u8 ch, u8 bw, u8 offset, u8 ifbmp_mod, u8 if_op, bool eirp);
|
s16 rtw_rfctl_get_reg_max_txpwr_mbm(struct rf_ctl_t *rfctl, enum band_type band, u8 ch, u8 bw, u8 offset, bool eirp);
|
|
u8 query_ra_short_GI(struct sta_info *psta, u8 bw);
|
|
u8 qos_acm(u8 acm_mask, u8 priority);
|
|
#if 0 /*def CONFIG_XMIT_THREAD_MODE*/
|
void enqueue_pending_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
void enqueue_pending_xmitbuf_to_head(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
struct xmit_buf *dequeue_pending_xmitbuf(struct xmit_priv *pxmitpriv);
|
struct xmit_buf *select_and_dequeue_pending_xmitbuf(_adapter *padapter);
|
sint check_pending_xmitbuf(struct xmit_priv *pxmitpriv);
|
thread_return rtw_xmit_thread(thread_context context);
|
#endif
|
|
#ifdef CONFIG_TX_AMSDU
|
extern void rtw_amsdu_vo_timeout_handler(void *FunctionContext);
|
extern void rtw_amsdu_vi_timeout_handler(void *FunctionContext);
|
extern void rtw_amsdu_be_timeout_handler(void *FunctionContext);
|
extern void rtw_amsdu_bk_timeout_handler(void *FunctionContext);
|
|
extern u8 rtw_amsdu_get_timer_status(_adapter *padapter, u8 priority);
|
extern void rtw_amsdu_set_timer_status(_adapter *padapter, u8 priority, u8 status);
|
extern void rtw_amsdu_set_timer(_adapter *padapter, u8 priority);
|
extern void rtw_amsdu_cancel_timer(_adapter *padapter, u8 priority);
|
|
extern s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_frame *pxmitframe_queue);
|
extern s32 check_amsdu(struct xmit_frame *pxmitframe);
|
extern s32 check_amsdu_tx_support(_adapter *padapter, struct pkt_attrib *pattrib);
|
extern struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame);
|
#endif
|
|
#ifdef DBG_TXBD_DESC_DUMP
|
void rtw_tx_desc_backup(_adapter *padapter, struct xmit_frame *pxmitframe, u8 desc_size, u8 hwq);
|
void rtw_tx_desc_backup_reset(void);
|
u8 rtw_get_tx_desc_backup(_adapter *padapter, u8 hwq, struct rtw_tx_desc_backup **pbak);
|
#endif
|
|
#ifdef CONFIG_PCI_TX_POLLING
|
void rtw_tx_poll_init(_adapter *padapter);
|
void rtw_tx_poll_timeout_handler(void *FunctionContext);
|
void rtw_tx_poll_timer_set(_adapter *padapter, u32 delay);
|
void rtw_tx_poll_timer_cancel(_adapter *padapter);
|
#endif
|
|
#ifdef CONFIG_XMIT_ACK
|
int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms);
|
void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status);
|
|
#ifdef CONFIG_XMIT_ACK_BY_REL_RPT
|
void rtw_ack_txfb_init(_adapter *padapter, struct rtw_txfb_t *txfb);
|
#endif
|
|
#endif /* CONFIG_XMIT_ACK */
|
|
enum XMIT_BLOCK_REASON {
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XMIT_BLOCK_NONE = 0,
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XMIT_BLOCK_REDLMEM = BIT0, /*LPS-PG*/
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XMIT_BLOCK_SUSPEND = BIT1, /*WOW*/
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XMIT_BLOCK_MAX = 0xFF,
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};
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void rtw_init_xmit_block(_adapter *padapter);
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void rtw_deinit_xmit_block(_adapter *padapter);
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#ifdef DBG_XMIT_BLOCK
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void dump_xmit_block(void *sel, _adapter *padapter);
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#endif
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void rtw_set_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason);
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void rtw_clr_xmit_block(_adapter *padapter, enum XMIT_BLOCK_REASON reason);
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bool rtw_is_xmit_blocked(_adapter *padapter);
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#ifdef CONFIG_LAYER2_ROAMING
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void dequeuq_roam_pkt(_adapter *padapter);
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#endif
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/* include after declaring struct xmit_buf, in order to avoid warning */
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#include <xmit_osdep.h>
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#endif /* _RTL871X_XMIT_H_ */
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