/*
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*
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* (C) COPYRIGHT 2014-2016 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU licence.
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*
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* A copy of the licence is included with the program, and can also be obtained
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* from Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*
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*/
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/*
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* Register-based HW access backend specific definitions
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*/
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#ifndef _KBASE_HWACCESS_GPU_DEFS_H_
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#define _KBASE_HWACCESS_GPU_DEFS_H_
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/* SLOT_RB_SIZE must be < 256 */
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#define SLOT_RB_SIZE 2
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#define SLOT_RB_MASK (SLOT_RB_SIZE - 1)
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/**
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* struct rb_entry - Ringbuffer entry
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* @katom: Atom associated with this entry
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*/
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struct rb_entry {
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struct kbase_jd_atom *katom;
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};
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/**
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* struct slot_rb - Slot ringbuffer
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* @entries: Ringbuffer entries
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* @last_context: The last context to submit a job on this slot
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* @read_idx: Current read index of buffer
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* @write_idx: Current write index of buffer
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* @job_chain_flag: Flag used to implement jobchain disambiguation
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*/
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struct slot_rb {
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struct rb_entry entries[SLOT_RB_SIZE];
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struct kbase_context *last_context;
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u8 read_idx;
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u8 write_idx;
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u8 job_chain_flag;
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};
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/**
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* struct kbase_backend_data - GPU backend specific data for HW access layer
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* @slot_rb: Slot ringbuffers
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* @rmu_workaround_flag: When PRLAM-8987 is present, this flag determines
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* whether slots 0/1 or slot 2 are currently being
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* pulled from
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* @scheduling_timer: The timer tick used for rescheduling jobs
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* @timer_running: Is the timer running? The runpool_mutex must be
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* held whilst modifying this.
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* @suspend_timer: Is the timer suspended? Set when a suspend
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* occurs and cleared on resume. The runpool_mutex
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* must be held whilst modifying this.
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* @reset_gpu: Set to a KBASE_RESET_xxx value (see comments)
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* @reset_workq: Work queue for performing the reset
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* @reset_work: Work item for performing the reset
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* @reset_wait: Wait event signalled when the reset is complete
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* @reset_timer: Timeout for soft-stops before the reset
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* @timeouts_updated: Have timeout values just been updated?
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*
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* The hwaccess_lock (a spinlock) must be held when accessing this structure
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*/
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struct kbase_backend_data {
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struct slot_rb slot_rb[BASE_JM_MAX_NR_SLOTS];
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bool rmu_workaround_flag;
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struct hrtimer scheduling_timer;
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bool timer_running;
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bool suspend_timer;
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atomic_t reset_gpu;
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/* The GPU reset isn't pending */
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#define KBASE_RESET_GPU_NOT_PENDING 0
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/* kbase_prepare_to_reset_gpu has been called */
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#define KBASE_RESET_GPU_PREPARED 1
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/* kbase_reset_gpu has been called - the reset will now definitely happen
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* within the timeout period */
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#define KBASE_RESET_GPU_COMMITTED 2
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/* The GPU reset process is currently occuring (timeout has expired or
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* kbasep_try_reset_gpu_early was called) */
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#define KBASE_RESET_GPU_HAPPENING 3
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/* Reset the GPU silently, used when resetting the GPU as part of normal
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* behavior (e.g. when exiting protected mode). */
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#define KBASE_RESET_GPU_SILENT 4
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struct workqueue_struct *reset_workq;
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struct work_struct reset_work;
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wait_queue_head_t reset_wait;
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struct hrtimer reset_timer;
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bool timeouts_updated;
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};
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/**
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* struct kbase_jd_atom_backend - GPU backend specific katom data
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*/
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struct kbase_jd_atom_backend {
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};
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/**
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* struct kbase_context_backend - GPU backend specific context data
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*/
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struct kbase_context_backend {
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};
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#endif /* _KBASE_HWACCESS_GPU_DEFS_H_ */
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