/*
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* (C) COPYRIGHT RockChip Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU licence.
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*/
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/* #define ENABLE_DEBUG_LOG */
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#include "custom_log.h"
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|
#include <mali_kbase.h>
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#include <mali_kbase_defs.h>
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#include <mali_kbase_config.h>
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#include <backend/gpu/mali_kbase_devfreq.h>
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#include <backend/gpu/mali_kbase_pm_internal.h>
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#include <backend/gpu/mali_kbase_pm_defs.h>
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#if MALI_USE_CSF
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#include <asm/arch_timer.h>
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#endif
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#include <linux/clk.h>
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#include <linux/pm_runtime.h>
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#include <linux/suspend.h>
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#include <linux/of.h>
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#include <linux/delay.h>
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#include <linux/mfd/syscon.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/regmap.h>
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#include <linux/soc/rockchip/pvtm.h>
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#include <linux/thermal.h>
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#include <soc/rockchip/rockchip_opp_select.h>
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#include <soc/rockchip/rockchip_system_monitor.h>
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#include "mali_kbase_config_platform.h"
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#include "mali_kbase_rk.h"
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#define POWER_DOWN_FREQ 200000000
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/**
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* @file mali_kbase_config_rk.c
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* 对 platform_config_of_rk 的具体实现.
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*
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* mali_device_driver 包含两部分 :
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* .DP : platform_dependent_part_in_mdd :
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* 依赖 platform 部分,
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* 源码在 <mdd_src_dir>/platform/<platform_name>/
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* 在 mali_device_driver 内部,
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* 记为 platform_dependent_part,
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* 也被记为 platform_specific_code.
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* .DP : common_parts_in_mdd :
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* arm 实现的通用的部分,
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* 源码在 <mdd_src_dir>/ 下.
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* 在 mali_device_driver 内部, 记为 common_parts.
|
*/
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/*---------------------------------------------------------------------------*/
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#ifndef CONFIG_MALI_BIFROST_DEVFREQ
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static inline void kbase_pm_get_dvfs_metrics(struct kbase_device *kbdev,
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struct kbasep_pm_metrics *last,
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struct kbasep_pm_metrics *diff)
|
{
|
}
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#endif
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#ifdef CONFIG_REGULATOR
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static int rk_pm_enable_regulator(struct kbase_device *kbdev);
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static void rk_pm_disable_regulator(struct kbase_device *kbdev);
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#else
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static inline int rk_pm_enable_regulator(struct kbase_device *kbdev)
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{
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return 0;
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}
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static inline void rk_pm_disable_regulator(struct kbase_device *kbdev)
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{
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}
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#endif
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static int rk_pm_enable_clk(struct kbase_device *kbdev);
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static void rk_pm_disable_clk(struct kbase_device *kbdev);
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static int kbase_platform_rk_create_sysfs_files(struct device *dev);
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static void kbase_platform_rk_remove_sysfs_files(struct device *dev);
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/*---------------------------------------------------------------------------*/
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static void rk_pm_power_off_delay_work(struct work_struct *work)
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{
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struct rk_context *platform =
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container_of(to_delayed_work(work), struct rk_context, work);
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struct kbase_device *kbdev = platform->kbdev;
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mutex_lock(&platform->lock);
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if (!platform->is_powered) {
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D("mali_dev is already powered off.");
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mutex_unlock(&platform->lock);
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return;
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}
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rockchip_monitor_volt_adjust_lock(kbdev->mdev_info);
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if (pm_runtime_enabled(kbdev->dev)) {
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D("to put_sync_suspend mali_dev.");
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pm_runtime_put_sync_suspend(kbdev->dev);
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}
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rockchip_monitor_volt_adjust_unlock(kbdev->mdev_info);
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rk_pm_disable_clk(kbdev);
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if (pm_runtime_suspended(kbdev->dev)) {
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rk_pm_disable_regulator(kbdev);
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platform->is_regulator_on = false;
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}
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platform->is_powered = false;
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wake_unlock(&platform->wake_lock);
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mutex_unlock(&platform->lock);
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}
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static int kbase_platform_rk_init(struct kbase_device *kbdev)
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{
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int ret = 0;
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struct rk_context *platform;
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platform = kzalloc(sizeof(*platform), GFP_KERNEL);
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if (!platform) {
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E("err.");
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return -ENOMEM;
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}
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platform->is_powered = false;
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platform->kbdev = kbdev;
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platform->delay_ms = 200;
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if (of_property_read_u32(kbdev->dev->of_node, "power-off-delay-ms",
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&platform->delay_ms))
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W("power-off-delay-ms not available.");
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platform->power_off_wq = create_freezable_workqueue("gpu_power_off_wq");
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if (!platform->power_off_wq) {
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E("couldn't create workqueue");
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ret = -ENOMEM;
|
goto err_wq;
|
}
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INIT_DEFERRABLE_WORK(&platform->work, rk_pm_power_off_delay_work);
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wake_lock_init(&platform->wake_lock, WAKE_LOCK_SUSPEND, "gpu");
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platform->utilisation_period = DEFAULT_UTILISATION_PERIOD_IN_MS;
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ret = kbase_platform_rk_create_sysfs_files(kbdev->dev);
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if (ret) {
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E("fail to create sysfs_files. ret = %d.", ret);
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goto err_sysfs_files;
|
}
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kbdev->platform_context = (void *)platform;
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pm_runtime_enable(kbdev->dev);
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mutex_init(&platform->lock);
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|
return 0;
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|
err_sysfs_files:
|
wake_lock_destroy(&platform->wake_lock);
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destroy_workqueue(platform->power_off_wq);
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err_wq:
|
return ret;
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}
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static void kbase_platform_rk_term(struct kbase_device *kbdev)
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{
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struct rk_context *platform =
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(struct rk_context *)kbdev->platform_context;
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pm_runtime_disable(kbdev->dev);
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kbdev->platform_context = NULL;
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if (platform) {
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cancel_delayed_work_sync(&platform->work);
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wake_lock_destroy(&platform->wake_lock);
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destroy_workqueue(platform->power_off_wq);
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platform->is_powered = false;
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platform->kbdev = NULL;
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kfree(platform);
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}
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kbase_platform_rk_remove_sysfs_files(kbdev->dev);
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}
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struct kbase_platform_funcs_conf platform_funcs = {
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.platform_init_func = &kbase_platform_rk_init,
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.platform_term_func = &kbase_platform_rk_term,
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};
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/*---------------------------------------------------------------------------*/
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static int rk_pm_callback_runtime_on(struct kbase_device *kbdev)
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{
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struct rockchip_opp_info *opp_info = &kbdev->opp_info;
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int ret = 0;
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if (!kbdev->current_nominal_freq)
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return 0;
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ret = clk_bulk_prepare_enable(opp_info->num_clks, opp_info->clks);
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if (ret) {
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dev_err(kbdev->dev, "failed to enable opp clks\n");
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return ret;
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}
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if (opp_info->data && opp_info->data->set_read_margin)
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opp_info->data->set_read_margin(kbdev->dev, opp_info,
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opp_info->target_rm);
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if (opp_info->scmi_clk) {
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if (clk_set_rate(opp_info->scmi_clk,
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kbdev->current_nominal_freq))
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dev_err(kbdev->dev, "failed to restore clk rate\n");
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}
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clk_bulk_disable_unprepare(opp_info->num_clks, opp_info->clks);
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return 0;
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}
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static void rk_pm_callback_runtime_off(struct kbase_device *kbdev)
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{
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struct rockchip_opp_info *opp_info = &kbdev->opp_info;
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if (opp_info->scmi_clk) {
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if (clk_set_rate(opp_info->scmi_clk, POWER_DOWN_FREQ))
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dev_err(kbdev->dev, "failed to set power down rate\n");
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}
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opp_info->current_rm = UINT_MAX;
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}
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static int rk_pm_callback_power_on(struct kbase_device *kbdev)
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{
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int ret = 1; /* Assume GPU has been powered off */
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int err = 0;
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struct rk_context *platform = get_rk_context(kbdev);
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cancel_delayed_work_sync(&platform->work);
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mutex_lock(&platform->lock);
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|
if (platform->is_powered) {
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D("mali_device is already powered.");
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ret = 0;
|
goto out;
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}
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|
/* we must enable vdd_gpu before pd_gpu_in_chip. */
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if (!platform->is_regulator_on) {
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err = rk_pm_enable_regulator(kbdev);
|
if (err) {
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E("fail to enable regulator, err : %d.", err);
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ret = err;
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goto out;
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}
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platform->is_regulator_on = true;
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}
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|
err = rk_pm_enable_clk(kbdev);
|
if (err) {
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E("failed to enable clk: %d", err);
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ret = err;
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goto out;
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}
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rockchip_monitor_volt_adjust_lock(kbdev->mdev_info);
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/* 若 mali_dev 的 runtime_pm 是 enabled 的, 则... */
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if (pm_runtime_enabled(kbdev->dev)) {
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D("to resume mali_dev syncly.");
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/* 对 pd_in_chip 的 on 操作,
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* 将在 pm_domain 的 runtime_pm_callbacks 中完成.
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*/
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err = pm_runtime_get_sync(kbdev->dev);
|
if (err < 0) {
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E("failed to runtime resume device: %d.", err);
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ret = err;
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goto out;
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} else if (err == 1) { /* runtime_pm_status is still active */
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D("chip has NOT been powered off, no need to re-init.");
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ret = 0;
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}
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}
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rockchip_monitor_volt_adjust_unlock(kbdev->mdev_info);
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platform->is_powered = true;
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wake_lock(&platform->wake_lock);
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out:
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mutex_unlock(&platform->lock);
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return ret;
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}
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static void rk_pm_callback_power_off(struct kbase_device *kbdev)
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{
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struct rk_context *platform = get_rk_context(kbdev);
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D("enter");
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queue_delayed_work(platform->power_off_wq, &platform->work,
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msecs_to_jiffies(platform->delay_ms));
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}
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static int rk_kbase_device_runtime_init(struct kbase_device *kbdev)
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{
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return 0;
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}
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static void rk_kbase_device_runtime_disable(struct kbase_device *kbdev)
|
{
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}
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struct kbase_pm_callback_conf pm_callbacks = {
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.power_on_callback = rk_pm_callback_power_on,
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.power_off_callback = rk_pm_callback_power_off,
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#ifdef CONFIG_PM
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.power_runtime_init_callback = rk_kbase_device_runtime_init,
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.power_runtime_term_callback = rk_kbase_device_runtime_disable,
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.power_runtime_on_callback = rk_pm_callback_runtime_on,
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.power_runtime_off_callback = rk_pm_callback_runtime_off,
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#else /* CONFIG_PM */
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.power_runtime_init_callback = NULL,
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.power_runtime_term_callback = NULL,
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.power_runtime_on_callback = NULL,
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.power_runtime_off_callback = NULL,
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#endif /* CONFIG_PM */
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};
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|
/*---------------------------------------------------------------------------*/
|
|
#ifdef CONFIG_REGULATOR
|
static int rk_pm_enable_regulator(struct kbase_device *kbdev)
|
{
|
int ret = 0;
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unsigned int i;
|
|
for (i = 0; i < kbdev->nr_regulators; i++) {
|
struct regulator *regulator = kbdev->regulators[i];
|
if (!regulator) {
|
W("no mali regulator control, no need to enable.");
|
goto EXIT;
|
}
|
|
D("to enable regulator.");
|
ret = regulator_enable(regulator);
|
if (ret) {
|
E("fail to enable regulator, ret : %d.", ret);
|
goto EXIT;
|
}
|
}
|
|
EXIT:
|
return ret;
|
}
|
|
static void rk_pm_disable_regulator(struct kbase_device *kbdev)
|
{
|
unsigned int i;
|
|
for (i = 0; i < kbdev->nr_regulators; i++) {
|
struct regulator *regulator = kbdev->regulators[i];
|
|
if (!regulator) {
|
W("no mali regulator control, no need to disable.");
|
return;
|
}
|
|
D("to disable regulator.");
|
regulator_disable(regulator);
|
}
|
}
|
#endif
|
|
static int rk_pm_enable_clk(struct kbase_device *kbdev)
|
{
|
int err = 0;
|
unsigned int i;
|
|
for (i = 0; i < kbdev->nr_clocks; i++) {
|
struct clk *clock = kbdev->clocks[i];
|
|
if (!clock) {
|
W("no mali clock control, no need to enable.");
|
} else {
|
D("to enable clk.");
|
err = clk_enable(clock);
|
if (err)
|
E("failed to enable clk: %d.", err);
|
}
|
}
|
|
return err;
|
}
|
|
static void rk_pm_disable_clk(struct kbase_device *kbdev)
|
{
|
unsigned int i;
|
|
for (i = 0; i < kbdev->nr_clocks; i++) {
|
struct clk *clock = kbdev->clocks[i];
|
|
if (!clock) {
|
W("no mali clock control, no need to disable.");
|
} else {
|
D("to disable clk.");
|
clk_disable(clock);
|
}
|
}
|
}
|
|
/*---------------------------------------------------------------------------*/
|
|
static ssize_t utilisation_period_show(struct device *dev,
|
struct device_attribute *attr,
|
char *buf)
|
{
|
struct kbase_device *kbdev = dev_get_drvdata(dev);
|
struct rk_context *platform = get_rk_context(kbdev);
|
ssize_t ret = 0;
|
|
ret += snprintf(buf, PAGE_SIZE, "%u\n", platform->utilisation_period);
|
|
return ret;
|
}
|
|
static ssize_t utilisation_period_store(struct device *dev,
|
struct device_attribute *attr,
|
const char *buf,
|
size_t count)
|
{
|
struct kbase_device *kbdev = dev_get_drvdata(dev);
|
struct rk_context *platform = get_rk_context(kbdev);
|
int ret = 0;
|
|
ret = kstrtouint(buf, 0, &platform->utilisation_period);
|
if (ret) {
|
E("invalid input period : %s.", buf);
|
return ret;
|
}
|
D("set utilisation_period to '%d'.", platform->utilisation_period);
|
|
return count;
|
}
|
|
static ssize_t utilisation_show(struct device *dev,
|
struct device_attribute *attr,
|
char *buf)
|
{
|
struct kbase_device *kbdev = dev_get_drvdata(dev);
|
struct rk_context *platform = get_rk_context(kbdev);
|
ssize_t ret = 0;
|
unsigned long period_in_us = platform->utilisation_period * 1000;
|
u32 utilisation;
|
struct kbasep_pm_metrics metrics_when_start;
|
struct kbasep_pm_metrics metrics_diff = {}; /* between start and end. */
|
u32 total_time = 0;
|
u32 busy_time = 0;
|
|
/* get current metrics data. */
|
kbase_pm_get_dvfs_metrics(kbdev, &metrics_when_start, &metrics_diff);
|
/* sleep for 'period_in_us'. */
|
usleep_range(period_in_us, period_in_us + 100);
|
/* get metrics data between start and end. */
|
kbase_pm_get_dvfs_metrics(kbdev, &metrics_when_start, &metrics_diff);
|
|
total_time = metrics_diff.time_busy + metrics_diff.time_idle;
|
busy_time = metrics_diff.time_busy;
|
D("total_time : %u, busy_time : %u.", total_time, busy_time);
|
|
utilisation = busy_time * 100 / total_time;
|
ret += snprintf(buf, PAGE_SIZE, "%d\n", utilisation);
|
|
return ret;
|
}
|
|
static DEVICE_ATTR_RW(utilisation_period);
|
static DEVICE_ATTR_RO(utilisation);
|
|
static int kbase_platform_rk_create_sysfs_files(struct device *dev)
|
{
|
int ret = 0;
|
|
ret = device_create_file(dev, &dev_attr_utilisation_period);
|
if (ret) {
|
E("fail to create sysfs file 'utilisation_period'.");
|
goto out;
|
}
|
|
ret = device_create_file(dev, &dev_attr_utilisation);
|
if (ret) {
|
E("fail to create sysfs file 'utilisation'.");
|
goto remove_utilisation_period;
|
}
|
|
return 0;
|
|
remove_utilisation_period:
|
device_remove_file(dev, &dev_attr_utilisation_period);
|
out:
|
return ret;
|
}
|
|
static void kbase_platform_rk_remove_sysfs_files(struct device *dev)
|
{
|
device_remove_file(dev, &dev_attr_utilisation_period);
|
device_remove_file(dev, &dev_attr_utilisation);
|
}
|
|
static int rk3588_gpu_get_soc_info(struct device *dev, struct device_node *np,
|
int *bin, int *process)
|
{
|
int ret = 0;
|
u8 value = 0;
|
|
if (!bin)
|
return 0;
|
|
if (of_property_match_string(np, "nvmem-cell-names",
|
"specification_serial_number") >= 0) {
|
ret = rockchip_nvmem_cell_read_u8(np,
|
"specification_serial_number",
|
&value);
|
if (ret) {
|
dev_err(dev,
|
"Failed to get specification_serial_number\n");
|
return ret;
|
}
|
/* RK3588M */
|
if (value == 0xd)
|
*bin = 1;
|
/* RK3588J */
|
else if (value == 0xa)
|
*bin = 2;
|
}
|
if (*bin < 0)
|
*bin = 0;
|
dev_info(dev, "bin=%d\n", *bin);
|
|
return ret;
|
}
|
|
static int rk3588_gpu_set_soc_info(struct device *dev, struct device_node *np,
|
int bin, int process, int volt_sel)
|
{
|
struct opp_table *opp_table;
|
u32 supported_hw[2];
|
|
if (volt_sel < 0)
|
return 0;
|
if (bin < 0)
|
bin = 0;
|
|
if (!of_property_read_bool(np, "rockchip,supported-hw"))
|
return 0;
|
|
/* SoC Version */
|
supported_hw[0] = BIT(bin);
|
/* Speed Grade */
|
supported_hw[1] = BIT(volt_sel);
|
opp_table = dev_pm_opp_set_supported_hw(dev, supported_hw, 2);
|
if (IS_ERR(opp_table)) {
|
dev_err(dev, "failed to set supported opp\n");
|
return PTR_ERR(opp_table);
|
}
|
|
return 0;
|
}
|
|
static int rk3588_gpu_set_read_margin(struct device *dev,
|
struct rockchip_opp_info *opp_info,
|
u32 rm)
|
{
|
int ret = 0;
|
u32 val;
|
|
if (!opp_info->grf || !opp_info->volt_rm_tbl)
|
return 0;
|
if (rm == opp_info->current_rm || rm == UINT_MAX)
|
return 0;
|
|
dev_dbg(dev, "set rm to %d\n", rm);
|
|
ret = regmap_read(opp_info->grf, 0x24, &val);
|
if (ret < 0) {
|
dev_err(dev, "failed to get rm from 0x24\n");
|
return ret;
|
}
|
val &= ~0x1c;
|
regmap_write(opp_info->grf, 0x24, val | (rm << 2));
|
|
ret = regmap_read(opp_info->grf, 0x28, &val);
|
if (ret < 0) {
|
dev_err(dev, "failed to get rm from 0x28\n");
|
return ret;
|
}
|
val &= ~0x1c;
|
regmap_write(opp_info->grf, 0x28, val | (rm << 2));
|
|
opp_info->current_rm = rm;
|
|
return 0;
|
}
|
|
static const struct rockchip_opp_data rk3588_gpu_opp_data = {
|
.get_soc_info = rk3588_gpu_get_soc_info,
|
.set_soc_info = rk3588_gpu_set_soc_info,
|
.set_read_margin = rk3588_gpu_set_read_margin,
|
};
|
|
static const struct of_device_id rockchip_mali_of_match[] = {
|
{
|
.compatible = "rockchip,rk3588",
|
.data = (void *)&rk3588_gpu_opp_data,
|
},
|
{},
|
};
|
|
int kbase_platform_rk_init_opp_table(struct kbase_device *kbdev)
|
{
|
rockchip_get_opp_data(rockchip_mali_of_match, &kbdev->opp_info);
|
|
return rockchip_init_opp_table(kbdev->dev, &kbdev->opp_info,
|
"gpu_leakage", "mali");
|
}
|
|
int kbase_platform_rk_enable_regulator(struct kbase_device *kbdev)
|
{
|
struct rk_context *platform = get_rk_context(kbdev);
|
int err = 0;
|
|
if (!platform->is_regulator_on) {
|
err = rk_pm_enable_regulator(kbdev);
|
if (err) {
|
E("fail to enable regulator, err : %d.", err);
|
return err;
|
}
|
platform->is_regulator_on = true;
|
}
|
|
return 0;
|
}
|
|
/*---------------------------------------------------------------------------*/
|
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static void *enumerate_gpu_clk(struct kbase_device *kbdev,
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unsigned int index)
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{
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if (index >= kbdev->nr_clocks)
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return NULL;
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return kbdev->clocks[index];
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}
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static unsigned long get_gpu_clk_rate(struct kbase_device *kbdev,
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void *gpu_clk_handle)
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{
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return clk_get_rate((struct clk *)gpu_clk_handle);
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}
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static int gpu_clk_notifier_register(struct kbase_device *kbdev,
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void *gpu_clk_handle, struct notifier_block *nb)
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{
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compiletime_assert(offsetof(struct clk_notifier_data, clk) ==
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offsetof(struct kbase_gpu_clk_notifier_data, gpu_clk_handle),
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"mismatch in the offset of clk member");
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compiletime_assert(sizeof(((struct clk_notifier_data *)0)->clk) ==
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sizeof(((struct kbase_gpu_clk_notifier_data *)0)->gpu_clk_handle),
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"mismatch in the size of clk member");
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return clk_notifier_register((struct clk *)gpu_clk_handle, nb);
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}
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static void gpu_clk_notifier_unregister(struct kbase_device *kbdev,
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void *gpu_clk_handle, struct notifier_block *nb)
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{
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clk_notifier_unregister((struct clk *)gpu_clk_handle, nb);
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}
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struct kbase_clk_rate_trace_op_conf clk_rate_trace_ops = {
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.get_gpu_clk_rate = get_gpu_clk_rate,
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.enumerate_gpu_clk = enumerate_gpu_clk,
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.gpu_clk_notifier_register = gpu_clk_notifier_register,
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.gpu_clk_notifier_unregister = gpu_clk_notifier_unregister,
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};
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