// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
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/*
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*
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* (C) COPYRIGHT 2021-2022 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU license.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you can access it online at
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* http://www.gnu.org/licenses/gpl-2.0.html.
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*
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*/
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#include "mali_kbase_pbha.h"
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#include <device/mali_kbase_device.h>
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#include <mali_kbase.h>
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#define DTB_SET_SIZE 2
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static bool read_setting_valid(unsigned int id, unsigned int read_setting)
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{
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switch (id) {
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/* Valid ID - fall through all */
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case SYSC_ALLOC_ID_R_OTHER:
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case SYSC_ALLOC_ID_R_CSF:
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case SYSC_ALLOC_ID_R_MMU:
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case SYSC_ALLOC_ID_R_TILER_VERT:
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case SYSC_ALLOC_ID_R_TILER_PTR:
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case SYSC_ALLOC_ID_R_TILER_INDEX:
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case SYSC_ALLOC_ID_R_TILER_OTHER:
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case SYSC_ALLOC_ID_R_IC:
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case SYSC_ALLOC_ID_R_ATTR:
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case SYSC_ALLOC_ID_R_SCM:
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case SYSC_ALLOC_ID_R_FSDC:
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case SYSC_ALLOC_ID_R_VL:
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case SYSC_ALLOC_ID_R_PLR:
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case SYSC_ALLOC_ID_R_TEX:
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case SYSC_ALLOC_ID_R_LSC:
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switch (read_setting) {
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/* Valid setting value - fall through all */
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case SYSC_ALLOC_L2_ALLOC:
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case SYSC_ALLOC_NEVER_ALLOC:
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case SYSC_ALLOC_ALWAYS_ALLOC:
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case SYSC_ALLOC_PTL_ALLOC:
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case SYSC_ALLOC_L2_PTL_ALLOC:
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return true;
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default:
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return false;
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}
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default:
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return false;
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}
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/* Unreachable */
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return false;
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}
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static bool write_setting_valid(unsigned int id, unsigned int write_setting)
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{
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switch (id) {
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/* Valid ID - fall through all */
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case SYSC_ALLOC_ID_W_OTHER:
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case SYSC_ALLOC_ID_W_CSF:
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case SYSC_ALLOC_ID_W_PCB:
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case SYSC_ALLOC_ID_W_TILER_PTR:
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case SYSC_ALLOC_ID_W_TILER_VERT_PLIST:
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case SYSC_ALLOC_ID_W_TILER_OTHER:
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case SYSC_ALLOC_ID_W_L2_EVICT:
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case SYSC_ALLOC_ID_W_L2_FLUSH:
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case SYSC_ALLOC_ID_W_TIB_COLOR:
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case SYSC_ALLOC_ID_W_TIB_COLOR_AFBCH:
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case SYSC_ALLOC_ID_W_TIB_COLOR_AFBCB:
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case SYSC_ALLOC_ID_W_TIB_CRC:
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case SYSC_ALLOC_ID_W_TIB_DS:
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case SYSC_ALLOC_ID_W_TIB_DS_AFBCH:
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case SYSC_ALLOC_ID_W_TIB_DS_AFBCB:
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case SYSC_ALLOC_ID_W_LSC:
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switch (write_setting) {
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/* Valid setting value - fall through all */
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case SYSC_ALLOC_L2_ALLOC:
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case SYSC_ALLOC_NEVER_ALLOC:
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case SYSC_ALLOC_ALWAYS_ALLOC:
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case SYSC_ALLOC_PTL_ALLOC:
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case SYSC_ALLOC_L2_PTL_ALLOC:
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return true;
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default:
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return false;
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}
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default:
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return false;
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}
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/* Unreachable */
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return false;
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}
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/* Private structure to be returned as setting validity status */
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struct settings_status {
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/* specifies whether id and either one of settings is valid */
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bool overall;
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/* specifies whether read setting is valid */
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bool read;
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/* specifies whether write setting is valid*/
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bool write;
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};
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static struct settings_status settings_valid(unsigned int id, unsigned int read_setting,
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unsigned int write_setting)
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{
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struct settings_status valid = { .overall = (id < SYSC_ALLOC_COUNT * sizeof(u32)) };
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if (valid.overall) {
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valid.read = read_setting_valid(id, read_setting);
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valid.write = write_setting_valid(id, write_setting);
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valid.overall = valid.read || valid.write;
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}
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return valid;
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}
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bool kbasep_pbha_supported(struct kbase_device *kbdev)
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{
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const u32 arch_maj_rev =
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ARCH_MAJOR_REV_REG(kbdev->gpu_props.props.raw_props.gpu_id);
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return (arch_maj_rev >= GPU_ID2_ARCH_MAJOR_REV_MAKE(11, 3));
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}
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int kbase_pbha_record_settings(struct kbase_device *kbdev, bool runtime,
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unsigned int id, unsigned int read_setting,
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unsigned int write_setting)
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{
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struct settings_status const valid = settings_valid(id, read_setting, write_setting);
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if (valid.overall) {
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unsigned int const sysc_alloc_num = id / sizeof(u32);
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u32 modified_reg;
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if (runtime) {
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int i;
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kbase_pm_context_active(kbdev);
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/* Ensure host copy of SYSC_ALLOC is up to date */
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for (i = 0; i < SYSC_ALLOC_COUNT; i++)
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kbdev->sysc_alloc[i] = kbase_reg_read(
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kbdev, GPU_CONTROL_REG(SYSC_ALLOC(i)));
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kbase_pm_context_idle(kbdev);
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}
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modified_reg = kbdev->sysc_alloc[sysc_alloc_num];
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switch (id % sizeof(u32)) {
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case 0:
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modified_reg = valid.read ? SYSC_ALLOC_R_SYSC_ALLOC0_SET(modified_reg,
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read_setting) :
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modified_reg;
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modified_reg = valid.write ? SYSC_ALLOC_W_SYSC_ALLOC0_SET(modified_reg,
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write_setting) :
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modified_reg;
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break;
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case 1:
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modified_reg = valid.read ? SYSC_ALLOC_R_SYSC_ALLOC1_SET(modified_reg,
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read_setting) :
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modified_reg;
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modified_reg = valid.write ? SYSC_ALLOC_W_SYSC_ALLOC1_SET(modified_reg,
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write_setting) :
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modified_reg;
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break;
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case 2:
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modified_reg = valid.read ? SYSC_ALLOC_R_SYSC_ALLOC2_SET(modified_reg,
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read_setting) :
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modified_reg;
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modified_reg = valid.write ? SYSC_ALLOC_W_SYSC_ALLOC2_SET(modified_reg,
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write_setting) :
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modified_reg;
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break;
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case 3:
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modified_reg = valid.read ? SYSC_ALLOC_R_SYSC_ALLOC3_SET(modified_reg,
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read_setting) :
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modified_reg;
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modified_reg = valid.write ? SYSC_ALLOC_W_SYSC_ALLOC3_SET(modified_reg,
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write_setting) :
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modified_reg;
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break;
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}
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kbdev->sysc_alloc[sysc_alloc_num] = modified_reg;
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}
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return valid.overall ? 0 : -EINVAL;
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}
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void kbase_pbha_write_settings(struct kbase_device *kbdev)
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{
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if (kbasep_pbha_supported(kbdev)) {
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int i;
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for (i = 0; i < SYSC_ALLOC_COUNT; ++i)
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kbase_reg_write(kbdev, GPU_CONTROL_REG(SYSC_ALLOC(i)),
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kbdev->sysc_alloc[i]);
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}
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}
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static int kbase_pbha_read_int_id_override_property(struct kbase_device *kbdev,
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const struct device_node *pbha_node)
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{
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u32 dtb_data[SYSC_ALLOC_COUNT * sizeof(u32) * DTB_SET_SIZE];
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int sz, i;
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bool valid = true;
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sz = of_property_count_elems_of_size(pbha_node, "int_id_override",
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sizeof(u32));
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if (sz <= 0 || (sz % DTB_SET_SIZE != 0)) {
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dev_err(kbdev->dev, "Bad DTB format: pbha.int_id_override\n");
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return -EINVAL;
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}
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if (of_property_read_u32_array(pbha_node, "int_id_override", dtb_data,
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sz) != 0) {
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dev_err(kbdev->dev,
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"Failed to read DTB pbha.int_id_override\n");
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return -EINVAL;
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}
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for (i = 0; valid && i < sz; i = i + DTB_SET_SIZE) {
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unsigned int rdset =
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SYSC_ALLOC_R_SYSC_ALLOC0_GET(dtb_data[i + 1]);
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unsigned int wrset =
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SYSC_ALLOC_W_SYSC_ALLOC0_GET(dtb_data[i + 1]);
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valid = valid &&
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(kbase_pbha_record_settings(kbdev, false, dtb_data[i],
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rdset, wrset) == 0);
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if (valid)
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dev_info(kbdev->dev,
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"pbha.int_id_override 0x%x r0x%x w0x%x\n",
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dtb_data[i], rdset, wrset);
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}
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if (i != sz || (!valid)) {
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dev_err(kbdev->dev,
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"Failed recording DTB data (pbha.int_id_override)\n");
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return -EINVAL;
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}
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return 0;
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}
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#if MALI_USE_CSF
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static int kbase_pbha_read_propagate_bits_property(struct kbase_device *kbdev,
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const struct device_node *pbha_node)
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{
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u32 bits;
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int err;
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if (!kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_PBHA_HWU))
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return 0;
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err = of_property_read_u32(pbha_node, "propagate_bits", &bits);
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if (err < 0) {
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if (err != -EINVAL) {
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dev_err(kbdev->dev,
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"DTB value for propagate_bits is improperly formed (err=%d)\n",
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err);
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return err;
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}
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}
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if (bits > (L2_CONFIG_PBHA_HWU_MASK >> L2_CONFIG_PBHA_HWU_SHIFT)) {
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dev_err(kbdev->dev, "Bad DTB value for propagate_bits: 0x%x\n", bits);
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return -EINVAL;
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}
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kbdev->pbha_propagate_bits = bits;
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return 0;
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}
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#endif
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int kbase_pbha_read_dtb(struct kbase_device *kbdev)
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{
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const struct device_node *pbha_node;
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int err;
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if (!kbasep_pbha_supported(kbdev))
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return 0;
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pbha_node = of_get_child_by_name(kbdev->dev->of_node, "pbha");
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if (!pbha_node)
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return 0;
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err = kbase_pbha_read_int_id_override_property(kbdev, pbha_node);
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#if MALI_USE_CSF
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if (err < 0)
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return err;
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err = kbase_pbha_read_propagate_bits_property(kbdev, pbha_node);
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#endif
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return err;
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}
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