/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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/*
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*
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* (C) COPYRIGHT 2014-2015, 2017-2022 ARM Limited. All rights reserved.
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*
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* This program is free software and is provided to you under the terms of the
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* GNU General Public License version 2 as published by the Free Software
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* Foundation, and any use by you of this program is subject to the terms
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* of such GNU license.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you can access it online at
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* http://www.gnu.org/licenses/gpl-2.0.html.
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*
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*/
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/*
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* Dummy Model interface
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*
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* Support for NO_MALI dummy Model interface.
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*
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* +-----------------------------------+
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* | Kbase read/write/IRQ |
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* +-----------------------------------+
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* | Model Linux Framework |
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* +-----------------------------------+
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* | Model Dummy interface definitions |
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* +-----------------+-----------------+
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* | Fake R/W | Fake IRQ |
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* +-----------------+-----------------+
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*/
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#ifndef _KBASE_MODEL_DUMMY_H_
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#define _KBASE_MODEL_DUMMY_H_
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#include <uapi/gpu/arm/bifrost/backend/gpu/mali_kbase_model_linux.h>
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#include <uapi/gpu/arm/bifrost/backend/gpu/mali_kbase_model_dummy.h>
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#define model_error_log(module, ...) pr_err(__VA_ARGS__)
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#define NUM_SLOTS 4 /*number of job slots */
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/*Errors Mask Codes*/
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/* each bit of errors_mask is associated to a specific error:
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* NON FAULT STATUS CODES: only the following are implemented since the others
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* represent normal working statuses
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*/
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#define KBASE_JOB_INTERRUPTED (1<<0)
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#define KBASE_JOB_STOPPED (1<<1)
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#define KBASE_JOB_TERMINATED (1<<2)
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/* JOB EXCEPTIONS: */
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#define KBASE_JOB_CONFIG_FAULT (1<<3)
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#define KBASE_JOB_POWER_FAULT (1<<4)
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#define KBASE_JOB_READ_FAULT (1<<5)
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#define KBASE_JOB_WRITE_FAULT (1<<6)
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#define KBASE_JOB_AFFINITY_FAULT (1<<7)
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#define KBASE_JOB_BUS_FAULT (1<<8)
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#define KBASE_INSTR_INVALID_PC (1<<9)
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#define KBASE_INSTR_INVALID_ENC (1<<10)
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#define KBASE_INSTR_TYPE_MISMATCH (1<<11)
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#define KBASE_INSTR_OPERAND_FAULT (1<<12)
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#define KBASE_INSTR_TLS_FAULT (1<<13)
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#define KBASE_INSTR_BARRIER_FAULT (1<<14)
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#define KBASE_INSTR_ALIGN_FAULT (1<<15)
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#define KBASE_DATA_INVALID_FAULT (1<<16)
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#define KBASE_TILE_RANGE_FAULT (1<<17)
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#define KBASE_ADDR_RANGE_FAULT (1<<18)
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#define KBASE_OUT_OF_MEMORY (1<<19)
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#define KBASE_UNKNOWN (1<<20)
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/* GPU EXCEPTIONS:*/
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#define KBASE_DELAYED_BUS_FAULT (1<<21)
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#define KBASE_SHAREABILITY_FAULT (1<<22)
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/* MMU EXCEPTIONS:*/
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#define KBASE_TRANSLATION_FAULT (1<<23)
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#define KBASE_PERMISSION_FAULT (1<<24)
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#define KBASE_TRANSTAB_BUS_FAULT (1<<25)
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#define KBASE_ACCESS_FLAG (1<<26)
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/* generic useful bitmasks */
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#define IS_A_JOB_ERROR ((KBASE_UNKNOWN << 1) - KBASE_JOB_INTERRUPTED)
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#define IS_A_MMU_ERROR ((KBASE_ACCESS_FLAG << 1) - KBASE_TRANSLATION_FAULT)
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#define IS_A_GPU_ERROR (KBASE_DELAYED_BUS_FAULT|KBASE_SHAREABILITY_FAULT)
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/* number of possible MMU address spaces */
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#define NUM_MMU_AS 16 /* total number of MMU address spaces as in
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* MMU_IRQ_RAWSTAT register
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*/
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/* Forward declaration */
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struct kbase_device;
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/*
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* the function below is used to trigger the simulation of a faulty
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* HW condition for a specific job chain atom
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*/
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struct kbase_error_params {
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u64 jc;
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u32 errors_mask;
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u32 mmu_table_level;
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u16 faulty_mmu_as;
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u16 padding[3];
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};
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enum kbase_model_control_command {
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/* Disable/Enable job completion in the dummy model */
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KBASE_MC_DISABLE_JOBS
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};
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/* struct to control dummy model behavior */
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struct kbase_model_control_params {
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s32 command;
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s32 value;
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};
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/* struct to track faulty atoms */
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struct kbase_error_atom {
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struct kbase_error_params params;
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struct kbase_error_atom *next;
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};
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/*struct to track the system error state*/
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struct error_status_t {
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spinlock_t access_lock;
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u32 errors_mask;
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u32 mmu_table_level;
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int faulty_mmu_as;
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u64 current_jc;
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int current_job_slot;
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u32 job_irq_rawstat;
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u32 job_irq_status;
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u32 js_status[NUM_SLOTS];
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u32 mmu_irq_mask;
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u32 mmu_irq_rawstat;
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u32 gpu_error_irq;
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u32 gpu_fault_status;
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u32 as_faultstatus[NUM_MMU_AS];
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u32 as_command[NUM_MMU_AS];
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u64 as_transtab[NUM_MMU_AS];
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};
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/**
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* struct gpu_model_prfcnt_en - Performance counter enable masks
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* @fe: Enable mask for front-end block
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* @tiler: Enable mask for tiler block
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* @l2: Enable mask for L2/Memory system blocks
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* @shader: Enable mask for shader core blocks
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*/
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struct gpu_model_prfcnt_en {
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u32 fe;
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u32 tiler;
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u32 l2;
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u32 shader;
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};
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void midgard_set_error(int job_slot);
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int job_atom_inject_error(struct kbase_error_params *params);
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int gpu_model_control(void *h,
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struct kbase_model_control_params *params);
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/**
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* gpu_model_set_dummy_prfcnt_user_sample() - Set performance counter values
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* @data: Userspace pointer to array of counter values
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* @size: Size of counter value array
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*
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* Counter values set by this function will be used for one sample dump only
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* after which counters will be cleared back to zero.
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*
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* Return: 0 on success, else error code.
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*/
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int gpu_model_set_dummy_prfcnt_user_sample(u32 __user *data, u32 size);
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/**
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* gpu_model_set_dummy_prfcnt_kernel_sample() - Set performance counter values
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* @data: Pointer to array of counter values
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* @size: Size of counter value array
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*
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* Counter values set by this function will be used for one sample dump only
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* after which counters will be cleared back to zero.
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*/
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void gpu_model_set_dummy_prfcnt_kernel_sample(u64 *data, u32 size);
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void gpu_model_get_dummy_prfcnt_cores(struct kbase_device *kbdev,
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u64 *l2_present, u64 *shader_present);
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void gpu_model_set_dummy_prfcnt_cores(struct kbase_device *kbdev,
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u64 l2_present, u64 shader_present);
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/* Clear the counter values array maintained by the dummy model */
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void gpu_model_clear_prfcnt_values(void);
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#if MALI_USE_CSF
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/**
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* gpu_model_prfcnt_dump_request() - Request performance counter sample dump.
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* @sample_buf: Pointer to KBASE_DUMMY_MODEL_MAX_VALUES_PER_SAMPLE sized array
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* in which to store dumped performance counter values.
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* @enable_maps: Physical enable maps for performance counter blocks.
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*/
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void gpu_model_prfcnt_dump_request(uint32_t *sample_buf, struct gpu_model_prfcnt_en enable_maps);
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/**
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* gpu_model_glb_request_job_irq() - Trigger job interrupt with global request
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* flag set.
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* @model: Model pointer returned by midgard_model_create().
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*/
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void gpu_model_glb_request_job_irq(void *model);
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#endif /* MALI_USE_CSF */
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extern struct error_status_t hw_error_status;
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#endif
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