/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* USB ConnectTech WhiteHEAT driver
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*
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* Copyright (C) 2002
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* Connect Tech Inc.
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*
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* Copyright (C) 1999, 2000
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* Greg Kroah-Hartman (greg@kroah.com)
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*
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* See Documentation/usb/usb-serial.rst for more information on using this
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* driver
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*
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*/
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#ifndef __LINUX_USB_SERIAL_WHITEHEAT_H
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#define __LINUX_USB_SERIAL_WHITEHEAT_H
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/* WhiteHEAT commands */
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#define WHITEHEAT_OPEN 1 /* open the port */
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#define WHITEHEAT_CLOSE 2 /* close the port */
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#define WHITEHEAT_SETUP_PORT 3 /* change port settings */
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#define WHITEHEAT_SET_RTS 4 /* turn RTS on or off */
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#define WHITEHEAT_SET_DTR 5 /* turn DTR on or off */
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#define WHITEHEAT_SET_BREAK 6 /* turn BREAK on or off */
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#define WHITEHEAT_DUMP 7 /* dump memory */
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#define WHITEHEAT_STATUS 8 /* get status */
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#define WHITEHEAT_PURGE 9 /* clear the UART fifos */
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#define WHITEHEAT_GET_DTR_RTS 10 /* get the state of DTR and RTS
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for a port */
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#define WHITEHEAT_GET_HW_INFO 11 /* get EEPROM info and
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hardware ID */
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#define WHITEHEAT_REPORT_TX_DONE 12 /* get the next TX done */
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#define WHITEHEAT_EVENT 13 /* unsolicited status events */
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#define WHITEHEAT_ECHO 14 /* send data to the indicated
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IN endpoint */
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#define WHITEHEAT_DO_TEST 15 /* perform specified test */
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#define WHITEHEAT_CMD_COMPLETE 16 /* reply for some commands */
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#define WHITEHEAT_CMD_FAILURE 17 /* reply for failed commands */
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/*
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* Commands to the firmware
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*/
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/*
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* WHITEHEAT_OPEN
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* WHITEHEAT_CLOSE
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* WHITEHEAT_STATUS
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* WHITEHEAT_GET_DTR_RTS
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* WHITEHEAT_REPORT_TX_DONE
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*/
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struct whiteheat_simple {
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__u8 port; /* port number (1 to N) */
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};
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/*
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* WHITEHEAT_SETUP_PORT
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*/
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#define WHITEHEAT_PAR_NONE 'n' /* no parity */
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#define WHITEHEAT_PAR_EVEN 'e' /* even parity */
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#define WHITEHEAT_PAR_ODD 'o' /* odd parity */
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#define WHITEHEAT_PAR_SPACE '0' /* space (force 0) parity */
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#define WHITEHEAT_PAR_MARK '1' /* mark (force 1) parity */
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#define WHITEHEAT_SFLOW_NONE 'n' /* no software flow control */
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#define WHITEHEAT_SFLOW_RX 'r' /* XOFF/ON is sent when RX
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fills/empties */
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#define WHITEHEAT_SFLOW_TX 't' /* when received XOFF/ON will
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stop/start TX */
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#define WHITEHEAT_SFLOW_RXTX 'b' /* both SFLOW_RX and SFLOW_TX */
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#define WHITEHEAT_HFLOW_NONE 0x00 /* no hardware flow control */
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#define WHITEHEAT_HFLOW_RTS_TOGGLE 0x01 /* RTS is on during transmit,
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off otherwise */
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#define WHITEHEAT_HFLOW_DTR 0x02 /* DTR is off/on when RX
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fills/empties */
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#define WHITEHEAT_HFLOW_CTS 0x08 /* when received CTS off/on
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will stop/start TX */
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#define WHITEHEAT_HFLOW_DSR 0x10 /* when received DSR off/on
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will stop/start TX */
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#define WHITEHEAT_HFLOW_RTS 0x80 /* RTS is off/on when RX
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fills/empties */
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struct whiteheat_port_settings {
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__u8 port; /* port number (1 to N) */
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__le32 baud; /* any value 7 - 460800, firmware calculates
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best fit; arrives little endian */
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__u8 bits; /* 5, 6, 7, or 8 */
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__u8 stop; /* 1 or 2, default 1 (2 = 1.5 if bits = 5) */
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__u8 parity; /* see WHITEHEAT_PAR_* above */
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__u8 sflow; /* see WHITEHEAT_SFLOW_* above */
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__u8 xoff; /* XOFF byte value */
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__u8 xon; /* XON byte value */
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__u8 hflow; /* see WHITEHEAT_HFLOW_* above */
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__u8 lloop; /* 0/1 turns local loopback mode off/on */
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} __attribute__ ((packed));
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/*
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* WHITEHEAT_SET_RTS
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* WHITEHEAT_SET_DTR
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* WHITEHEAT_SET_BREAK
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*/
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#define WHITEHEAT_RTS_OFF 0x00
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#define WHITEHEAT_RTS_ON 0x01
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#define WHITEHEAT_DTR_OFF 0x00
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#define WHITEHEAT_DTR_ON 0x01
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#define WHITEHEAT_BREAK_OFF 0x00
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#define WHITEHEAT_BREAK_ON 0x01
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struct whiteheat_set_rdb {
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__u8 port; /* port number (1 to N) */
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__u8 state; /* 0/1 turns signal off/on */
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};
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/*
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* WHITEHEAT_DUMP
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*/
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#define WHITEHEAT_DUMP_MEM_DATA 'd' /* data */
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#define WHITEHEAT_DUMP_MEM_IDATA 'i' /* idata */
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#define WHITEHEAT_DUMP_MEM_BDATA 'b' /* bdata */
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#define WHITEHEAT_DUMP_MEM_XDATA 'x' /* xdata */
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/*
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* Allowable address ranges (firmware checks address):
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* Type DATA: 0x00 - 0xff
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* Type IDATA: 0x80 - 0xff
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* Type BDATA: 0x20 - 0x2f
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* Type XDATA: 0x0000 - 0xffff
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*
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* B/I/DATA all read the local memory space
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* XDATA reads the external memory space
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* BDATA returns bits as bytes
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*
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* NOTE: 0x80 - 0xff (local space) are the Special Function Registers
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* of the 8051, and some have on-read side-effects.
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*/
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struct whiteheat_dump {
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__u8 mem_type; /* see WHITEHEAT_DUMP_* above */
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__u16 addr; /* address, see restrictions above */
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__u16 length; /* number of bytes to dump, max 63 bytes */
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};
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/*
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* WHITEHEAT_PURGE
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*/
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#define WHITEHEAT_PURGE_RX 0x01 /* purge rx fifos */
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#define WHITEHEAT_PURGE_TX 0x02 /* purge tx fifos */
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struct whiteheat_purge {
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__u8 port; /* port number (1 to N) */
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__u8 what; /* bit pattern of what to purge */
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};
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/*
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* WHITEHEAT_ECHO
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*/
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struct whiteheat_echo {
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__u8 port; /* port number (1 to N) */
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__u8 length; /* length of message to echo, max 61 bytes */
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__u8 echo_data[61]; /* data to echo */
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};
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/*
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* WHITEHEAT_DO_TEST
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*/
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#define WHITEHEAT_TEST_UART_RW 0x01 /* read/write uart registers */
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#define WHITEHEAT_TEST_UART_INTR 0x02 /* uart interrupt */
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#define WHITEHEAT_TEST_SETUP_CONT 0x03 /* setup for
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PORT_CONT/PORT_DISCONT */
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#define WHITEHEAT_TEST_PORT_CONT 0x04 /* port connect */
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#define WHITEHEAT_TEST_PORT_DISCONT 0x05 /* port disconnect */
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#define WHITEHEAT_TEST_UART_CLK_START 0x06 /* uart clock test start */
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#define WHITEHEAT_TEST_UART_CLK_STOP 0x07 /* uart clock test stop */
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#define WHITEHEAT_TEST_MODEM_FT 0x08 /* modem signals, requires a
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loopback cable/connector */
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#define WHITEHEAT_TEST_ERASE_EEPROM 0x09 /* erase eeprom */
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#define WHITEHEAT_TEST_READ_EEPROM 0x0a /* read eeprom */
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#define WHITEHEAT_TEST_PROGRAM_EEPROM 0x0b /* program eeprom */
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struct whiteheat_test {
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__u8 port; /* port number (1 to n) */
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__u8 test; /* see WHITEHEAT_TEST_* above*/
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__u8 info[32]; /* additional info */
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};
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/*
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* Replies from the firmware
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*/
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/*
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* WHITEHEAT_STATUS
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*/
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#define WHITEHEAT_EVENT_MODEM 0x01 /* modem field is valid */
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#define WHITEHEAT_EVENT_ERROR 0x02 /* error field is valid */
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#define WHITEHEAT_EVENT_FLOW 0x04 /* flow field is valid */
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#define WHITEHEAT_EVENT_CONNECT 0x08 /* connect field is valid */
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#define WHITEHEAT_FLOW_NONE 0x00 /* no flow control active */
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#define WHITEHEAT_FLOW_HARD_OUT 0x01 /* TX is stopped by CTS
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(waiting for CTS to go on) */
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#define WHITEHEAT_FLOW_HARD_IN 0x02 /* remote TX is stopped
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by RTS */
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#define WHITEHEAT_FLOW_SOFT_OUT 0x04 /* TX is stopped by XOFF
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received (waiting for XON) */
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#define WHITEHEAT_FLOW_SOFT_IN 0x08 /* remote TX is stopped by XOFF
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transmitted */
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#define WHITEHEAT_FLOW_TX_DONE 0x80 /* TX has completed */
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struct whiteheat_status_info {
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__u8 port; /* port number (1 to N) */
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__u8 event; /* indicates what the current event is,
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see WHITEHEAT_EVENT_* above */
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__u8 modem; /* modem signal status (copy of uart's
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MSR register) */
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__u8 error; /* line status (copy of uart's LSR register) */
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__u8 flow; /* flow control state, see WHITEHEAT_FLOW_*
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above */
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__u8 connect; /* 0 means not connected, non-zero means
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connected */
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};
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/*
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* WHITEHEAT_GET_DTR_RTS
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*/
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struct whiteheat_dr_info {
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__u8 mcr; /* copy of uart's MCR register */
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};
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/*
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* WHITEHEAT_GET_HW_INFO
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*/
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struct whiteheat_hw_info {
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__u8 hw_id; /* hardware id number, WhiteHEAT = 0 */
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__u8 sw_major_rev; /* major version number */
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__u8 sw_minor_rev; /* minor version number */
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struct whiteheat_hw_eeprom_info {
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__u8 b0; /* B0 */
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__u8 vendor_id_low; /* vendor id (low byte) */
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__u8 vendor_id_high; /* vendor id (high byte) */
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__u8 product_id_low; /* product id (low byte) */
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__u8 product_id_high; /* product id (high byte) */
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__u8 device_id_low; /* device id (low byte) */
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__u8 device_id_high; /* device id (high byte) */
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__u8 not_used_1;
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__u8 serial_number_0; /* serial number (low byte) */
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__u8 serial_number_1; /* serial number */
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__u8 serial_number_2; /* serial number */
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__u8 serial_number_3; /* serial number (high byte) */
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__u8 not_used_2;
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__u8 not_used_3;
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__u8 checksum_low; /* checksum (low byte) */
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__u8 checksum_high; /* checksum (high byte */
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} hw_eeprom_info; /* EEPROM contents */
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};
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/*
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* WHITEHEAT_EVENT
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*/
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struct whiteheat_event_info {
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__u8 port; /* port number (1 to N) */
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__u8 event; /* see whiteheat_status_info.event */
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__u8 info; /* see whiteheat_status_info.modem, .error,
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.flow, .connect */
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};
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/*
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* WHITEHEAT_DO_TEST
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*/
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#define WHITEHEAT_TEST_FAIL 0x00 /* test failed */
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#define WHITEHEAT_TEST_UNKNOWN 0x01 /* unknown test requested */
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#define WHITEHEAT_TEST_PASS 0xff /* test passed */
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struct whiteheat_test_info {
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__u8 port; /* port number (1 to N) */
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__u8 test; /* indicates which test this is a response for,
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see WHITEHEAT_DO_TEST above */
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__u8 status; /* see WHITEHEAT_TEST_* above */
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__u8 results[32]; /* test-dependent results */
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};
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#endif
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