/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Driver for Realtek PCI-Express card reader
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*
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* Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
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*
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* Author:
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* Wei WANG (wei_wang@realsil.com.cn)
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* Micky Ching (micky_ching@realsil.com.cn)
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*/
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#ifndef __REALTEK_RTSX_SD_H
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#define __REALTEK_RTSX_SD_H
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#include "rtsx_chip.h"
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#define SUPPORT_VOLTAGE 0x003C0000
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/* Error Code */
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#define SD_NO_ERROR 0x0
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#define SD_CRC_ERR 0x80
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#define SD_TO_ERR 0x40
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#define SD_NO_CARD 0x20
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#define SD_BUSY 0x10
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#define SD_STS_ERR 0x08
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#define SD_RSP_TIMEOUT 0x04
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#define SD_IO_ERR 0x02
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/* Return code for MMC switch bus */
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#define SWITCH_SUCCESS 0
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#define SWITCH_ERR 1
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#define SWITCH_FAIL 2
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/* MMC/SD Command Index */
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/* Basic command (class 0) */
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#define GO_IDLE_STATE 0
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#define SEND_OP_COND 1
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#define ALL_SEND_CID 2
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#define SET_RELATIVE_ADDR 3
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#define SEND_RELATIVE_ADDR 3
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#define SET_DSR 4
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#define IO_SEND_OP_COND 5
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#define SWITCH 6
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#define SELECT_CARD 7
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#define DESELECT_CARD 7
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/* CMD8 is "SEND_EXT_CSD" for MMC4.x Spec
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* while is "SEND_IF_COND" for SD 2.0
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*/
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#define SEND_EXT_CSD 8
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#define SEND_IF_COND 8
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#define SEND_CSD 9
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#define SEND_CID 10
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#define VOLTAGE_SWITCH 11
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#define READ_DAT_UTIL_STOP 11
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#define STOP_TRANSMISSION 12
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#define SEND_STATUS 13
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#define GO_INACTIVE_STATE 15
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#define SET_BLOCKLEN 16
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#define READ_SINGLE_BLOCK 17
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#define READ_MULTIPLE_BLOCK 18
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#define SEND_TUNING_PATTERN 19
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#define BUSTEST_R 14
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#define BUSTEST_W 19
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#define WRITE_BLOCK 24
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#define WRITE_MULTIPLE_BLOCK 25
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#define PROGRAM_CSD 27
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#define ERASE_WR_BLK_START 32
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#define ERASE_WR_BLK_END 33
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#define ERASE_CMD 38
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#define LOCK_UNLOCK 42
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#define IO_RW_DIRECT 52
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#define APP_CMD 55
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#define GEN_CMD 56
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#define SET_BUS_WIDTH 6
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#define SD_STATUS 13
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#define SEND_NUM_WR_BLOCKS 22
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#define SET_WR_BLK_ERASE_COUNT 23
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#define SD_APP_OP_COND 41
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#define SET_CLR_CARD_DETECT 42
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#define SEND_SCR 51
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#define SD_READ_COMPLETE 0x00
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#define SD_READ_TO 0x01
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#define SD_READ_ADVENCE 0x02
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#define SD_CHECK_MODE 0x00
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#define SD_SWITCH_MODE 0x80
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#define SD_FUNC_GROUP_1 0x01
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#define SD_FUNC_GROUP_2 0x02
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#define SD_FUNC_GROUP_3 0x03
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#define SD_FUNC_GROUP_4 0x04
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#define SD_CHECK_SPEC_V1_1 0xFF
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#define NO_ARGUMENT 0x00
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#define CHECK_PATTERN 0x000000AA
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#define VOLTAGE_SUPPLY_RANGE 0x00000100
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#define SUPPORT_HIGH_AND_EXTENDED_CAPACITY 0x40000000
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#define SUPPORT_MAX_POWER_PERMANCE 0x10000000
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#define SUPPORT_1V8 0x01000000
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#define SWITCH_NO_ERR 0x00
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#define CARD_NOT_EXIST 0x01
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#define SPEC_NOT_SUPPORT 0x02
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#define CHECK_MODE_ERR 0x03
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#define CHECK_NOT_READY 0x04
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#define SWITCH_CRC_ERR 0x05
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#define SWITCH_MODE_ERR 0x06
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#define SWITCH_PASS 0x07
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#ifdef SUPPORT_SD_LOCK
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#define SD_ERASE 0x08
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#define SD_LOCK 0x04
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#define SD_UNLOCK 0x00
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#define SD_CLR_PWD 0x02
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#define SD_SET_PWD 0x01
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#define SD_PWD_LEN 0x10
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#define SD_LOCKED 0x80
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#define SD_LOCK_1BIT_MODE 0x40
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#define SD_PWD_EXIST 0x20
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#define SD_UNLOCK_POW_ON 0x01
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#define SD_SDR_RST 0x02
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#define SD_NOT_ERASE 0x00
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#define SD_UNDER_ERASING 0x01
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#define SD_COMPLETE_ERASE 0x02
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#define SD_RW_FORBIDDEN 0x0F
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#endif
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#define HS_SUPPORT 0x01
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#define SDR50_SUPPORT 0x02
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#define SDR104_SUPPORT 0x03
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#define DDR50_SUPPORT 0x04
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#define HS_SUPPORT_MASK 0x02
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#define SDR50_SUPPORT_MASK 0x04
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#define SDR104_SUPPORT_MASK 0x08
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#define DDR50_SUPPORT_MASK 0x10
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#define HS_QUERY_SWITCH_OK 0x01
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#define SDR50_QUERY_SWITCH_OK 0x02
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#define SDR104_QUERY_SWITCH_OK 0x03
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#define DDR50_QUERY_SWITCH_OK 0x04
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#define HS_SWITCH_BUSY 0x02
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#define SDR50_SWITCH_BUSY 0x04
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#define SDR104_SWITCH_BUSY 0x08
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#define DDR50_SWITCH_BUSY 0x10
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#define FUNCTION_GROUP1_SUPPORT_OFFSET 0x0D
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#define FUNCTION_GROUP1_QUERY_SWITCH_OFFSET 0x10
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#define FUNCTION_GROUP1_CHECK_BUSY_OFFSET 0x1D
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#define DRIVING_TYPE_A 0x01
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#define DRIVING_TYPE_B 0x00
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#define DRIVING_TYPE_C 0x02
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#define DRIVING_TYPE_D 0x03
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#define DRIVING_TYPE_A_MASK 0x02
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#define DRIVING_TYPE_B_MASK 0x01
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#define DRIVING_TYPE_C_MASK 0x04
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#define DRIVING_TYPE_D_MASK 0x08
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#define TYPE_A_QUERY_SWITCH_OK 0x01
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#define TYPE_B_QUERY_SWITCH_OK 0x00
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#define TYPE_C_QUERY_SWITCH_OK 0x02
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#define TYPE_D_QUERY_SWITCH_OK 0x03
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#define TYPE_A_SWITCH_BUSY 0x02
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#define TYPE_B_SWITCH_BUSY 0x01
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#define TYPE_C_SWITCH_BUSY 0x04
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#define TYPE_D_SWITCH_BUSY 0x08
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#define FUNCTION_GROUP3_SUPPORT_OFFSET 0x09
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#define FUNCTION_GROUP3_QUERY_SWITCH_OFFSET 0x0F
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#define FUNCTION_GROUP3_CHECK_BUSY_OFFSET 0x19
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#define CURRENT_LIMIT_200 0x00
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#define CURRENT_LIMIT_400 0x01
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#define CURRENT_LIMIT_600 0x02
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#define CURRENT_LIMIT_800 0x03
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#define CURRENT_LIMIT_200_MASK 0x01
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#define CURRENT_LIMIT_400_MASK 0x02
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#define CURRENT_LIMIT_600_MASK 0x04
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#define CURRENT_LIMIT_800_MASK 0x08
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#define CURRENT_LIMIT_200_QUERY_SWITCH_OK 0x00
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#define CURRENT_LIMIT_400_QUERY_SWITCH_OK 0x01
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#define CURRENT_LIMIT_600_QUERY_SWITCH_OK 0x02
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#define CURRENT_LIMIT_800_QUERY_SWITCH_OK 0x03
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#define CURRENT_LIMIT_200_SWITCH_BUSY 0x01
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#define CURRENT_LIMIT_400_SWITCH_BUSY 0x02
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#define CURRENT_LIMIT_600_SWITCH_BUSY 0x04
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#define CURRENT_LIMIT_800_SWITCH_BUSY 0x08
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#define FUNCTION_GROUP4_SUPPORT_OFFSET 0x07
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#define FUNCTION_GROUP4_QUERY_SWITCH_OFFSET 0x0F
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#define FUNCTION_GROUP4_CHECK_BUSY_OFFSET 0x17
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#define DATA_STRUCTURE_VER_OFFSET 0x11
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#define MAX_PHASE 31
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#define MMC_8BIT_BUS 0x0010
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#define MMC_4BIT_BUS 0x0020
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#define MMC_SWITCH_ERR 0x80
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#define SD_IO_3V3 0
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#define SD_IO_1V8 1
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#define TUNE_TX 0x00
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#define TUNE_RX 0x01
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#define CHANGE_TX 0x00
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#define CHANGE_RX 0x01
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#define DCM_HIGH_FREQUENCY_MODE 0x00
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#define DCM_LOW_FREQUENCY_MODE 0x01
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#define DCM_HIGH_FREQUENCY_MODE_SET 0x0C
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#define DCM_LOW_FREQUENCY_MODE_SET 0x00
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#define MULTIPLY_BY_1 0x00
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#define MULTIPLY_BY_2 0x01
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#define MULTIPLY_BY_3 0x02
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#define MULTIPLY_BY_4 0x03
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#define MULTIPLY_BY_5 0x04
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#define MULTIPLY_BY_6 0x05
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#define MULTIPLY_BY_7 0x06
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#define MULTIPLY_BY_8 0x07
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#define MULTIPLY_BY_9 0x08
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#define MULTIPLY_BY_10 0x09
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#define DIVIDE_BY_2 0x01
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#define DIVIDE_BY_3 0x02
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#define DIVIDE_BY_4 0x03
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#define DIVIDE_BY_5 0x04
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#define DIVIDE_BY_6 0x05
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#define DIVIDE_BY_7 0x06
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#define DIVIDE_BY_8 0x07
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#define DIVIDE_BY_9 0x08
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#define DIVIDE_BY_10 0x09
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struct timing_phase_path {
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int start;
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int end;
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int mid;
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int len;
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};
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int sd_select_card(struct rtsx_chip *chip, int select);
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int sd_pull_ctl_enable(struct rtsx_chip *chip);
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int reset_sd_card(struct rtsx_chip *chip);
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int sd_switch_clock(struct rtsx_chip *chip);
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void sd_stop_seq_mode(struct rtsx_chip *chip);
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int sd_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
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u32 start_sector, u16 sector_cnt);
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void sd_cleanup_work(struct rtsx_chip *chip);
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int sd_power_off_card3v3(struct rtsx_chip *chip);
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int release_sd_card(struct rtsx_chip *chip);
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#ifdef SUPPORT_CPRM
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int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
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u32 arg, u8 rsp_type, u8 *rsp, int rsp_len,
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bool special_check);
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int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type);
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int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip);
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int sd_execute_no_data(struct scsi_cmnd *srb, struct rtsx_chip *chip);
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int sd_execute_read_data(struct scsi_cmnd *srb, struct rtsx_chip *chip);
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int sd_execute_write_data(struct scsi_cmnd *srb, struct rtsx_chip *chip);
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int sd_get_cmd_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip);
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int sd_hw_rst(struct scsi_cmnd *srb, struct rtsx_chip *chip);
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#endif
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#endif /* __REALTEK_RTSX_SD_H */
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