/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015, NVIDIA Corporation.
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*/
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#ifndef _FALCON_H_
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#define _FALCON_H_
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#include <linux/types.h>
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#define FALCON_UCLASS_METHOD_OFFSET 0x00000040
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#define FALCON_UCLASS_METHOD_DATA 0x00000044
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#define FALCON_IRQMSET 0x00001010
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#define FALCON_IRQMSET_WDTMR (1 << 1)
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#define FALCON_IRQMSET_HALT (1 << 4)
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#define FALCON_IRQMSET_EXTERR (1 << 5)
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#define FALCON_IRQMSET_SWGEN0 (1 << 6)
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#define FALCON_IRQMSET_SWGEN1 (1 << 7)
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#define FALCON_IRQMSET_EXT(v) (((v) & 0xff) << 8)
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#define FALCON_IRQDEST 0x0000101c
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#define FALCON_IRQDEST_HALT (1 << 4)
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#define FALCON_IRQDEST_EXTERR (1 << 5)
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#define FALCON_IRQDEST_SWGEN0 (1 << 6)
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#define FALCON_IRQDEST_SWGEN1 (1 << 7)
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#define FALCON_IRQDEST_EXT(v) (((v) & 0xff) << 8)
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#define FALCON_ITFEN 0x00001048
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#define FALCON_ITFEN_CTXEN (1 << 0)
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#define FALCON_ITFEN_MTHDEN (1 << 1)
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#define FALCON_IDLESTATE 0x0000104c
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#define FALCON_CPUCTL 0x00001100
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#define FALCON_CPUCTL_STARTCPU (1 << 1)
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#define FALCON_BOOTVEC 0x00001104
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#define FALCON_DMACTL 0x0000110c
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#define FALCON_DMACTL_DMEM_SCRUBBING (1 << 1)
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#define FALCON_DMACTL_IMEM_SCRUBBING (1 << 2)
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#define FALCON_DMATRFBASE 0x00001110
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#define FALCON_DMATRFMOFFS 0x00001114
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#define FALCON_DMATRFCMD 0x00001118
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#define FALCON_DMATRFCMD_IDLE (1 << 1)
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#define FALCON_DMATRFCMD_IMEM (1 << 4)
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#define FALCON_DMATRFCMD_SIZE_256B (6 << 8)
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#define FALCON_DMATRFFBOFFS 0x0000111c
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struct falcon_fw_bin_header_v1 {
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u32 magic; /* 0x10de */
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u32 version; /* version of bin format (1) */
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u32 size; /* entire image size including this header */
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u32 os_header_offset;
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u32 os_data_offset;
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u32 os_size;
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};
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struct falcon_fw_os_app_v1 {
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u32 offset;
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u32 size;
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};
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struct falcon_fw_os_header_v1 {
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u32 code_offset;
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u32 code_size;
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u32 data_offset;
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u32 data_size;
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};
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struct falcon_firmware_section {
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unsigned long offset;
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size_t size;
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};
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struct falcon_firmware {
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/* Firmware after it is read but not loaded */
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const struct firmware *firmware;
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/* Raw firmware data */
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dma_addr_t iova;
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dma_addr_t phys;
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void *virt;
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size_t size;
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/* Parsed firmware information */
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struct falcon_firmware_section bin_data;
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struct falcon_firmware_section data;
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struct falcon_firmware_section code;
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};
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struct falcon {
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/* Set by falcon client */
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struct device *dev;
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void __iomem *regs;
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struct falcon_firmware firmware;
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};
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int falcon_init(struct falcon *falcon);
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void falcon_exit(struct falcon *falcon);
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int falcon_read_firmware(struct falcon *falcon, const char *firmware_name);
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int falcon_load_firmware(struct falcon *falcon);
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int falcon_boot(struct falcon *falcon);
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void falcon_execute_method(struct falcon *falcon, u32 method, u32 data);
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int falcon_wait_idle(struct falcon *falcon);
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#endif /* _FALCON_H_ */
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