/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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* Author: Sandy Huang <hjc@rock-chips.com>
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*/
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#ifndef ROCKCHIP_DRM_DEBUGFS_H
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#define ROCKCHIP_DRM_DEBUGFS_H
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/**
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* struct vop_dump_info - vop dump plane info structure
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*
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* Store plane info used to write display data to /data/vop_buf/
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*
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*/
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struct vop_dump_info {
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/* @win_id: vop hard win index */
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u8 win_id;
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/* @area_id: vop hard area index inside win */
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u8 area_id;
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/* @AFBC_flag: indicate the buffer compress by gpu or not */
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bool AFBC_flag;
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/* @yuv_format: indicate yuv format or not */
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bool yuv_format;
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/* @pitches: the buffer pitch size */
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u32 pitches;
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/* @height: the buffer pitch height */
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u32 height;
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/* @info: DRM format info */
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const struct drm_format_info *format;
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/* @offset: the buffer offset */
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unsigned long offset;
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/* @num_pages: the pages number */
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unsigned long num_pages;
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/* @pages: store the buffer all pages */
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struct page **pages;
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};
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/**
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* struct vop_dump_list - store all buffer info per frame
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*
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* one frame maybe multiple buffer, all will be stored here.
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*
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*/
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struct vop_dump_list {
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struct list_head entry;
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struct vop_dump_info dump_info;
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};
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enum vop_dump_status {
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DUMP_DISABLE = 0,
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DUMP_KEEP
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};
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#if defined(CONFIG_ROCKCHIP_DRM_DEBUG)
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int rockchip_drm_add_dump_buffer(struct drm_crtc *crtc, struct dentry *root);
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int rockchip_drm_dump_plane_buffer(struct vop_dump_info *dump_info, int frame_count);
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int rockchip_drm_debugfs_add_color_bar(struct drm_crtc *crtc, struct dentry *root);
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#else
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static inline int
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rockchip_drm_add_dump_buffer(struct drm_crtc *crtc, struct dentry *root)
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{
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return 0;
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}
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static inline int
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rockchip_drm_dump_plane_buffer(struct vop_dump_info *dump_info, int frame_count)
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{
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return 0;
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}
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static inline int
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rockchip_drm_debugfs_add_color_bar(struct drm_crtc *crtc, struct dentry *root)
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{
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return 0;
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}
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#endif
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#endif
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