/*
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* Copyright 2012-15 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __DAL_DDC_SERVICE_TYPES_H__
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#define __DAL_DDC_SERVICE_TYPES_H__
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/* 0010FA dongles (ST Micro) external converter chip id */
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#define DP_BRANCH_DEVICE_ID_0010FA 0x0010FA
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/* 0022B9 external converter chip id */
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#define DP_BRANCH_DEVICE_ID_0022B9 0x0022B9
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#define DP_BRANCH_DEVICE_ID_00001A 0x00001A
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#define DP_BRANCH_DEVICE_ID_0080E1 0x0080e1
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#define DP_BRANCH_DEVICE_ID_90CC24 0x90CC24
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#define DP_BRANCH_DEVICE_ID_00E04C 0x00E04C
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enum ddc_result {
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DDC_RESULT_UNKNOWN = 0,
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DDC_RESULT_SUCESSFULL,
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DDC_RESULT_FAILED_CHANNEL_BUSY,
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DDC_RESULT_FAILED_TIMEOUT,
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DDC_RESULT_FAILED_PROTOCOL_ERROR,
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DDC_RESULT_FAILED_NACK,
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DDC_RESULT_FAILED_INCOMPLETE,
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DDC_RESULT_FAILED_OPERATION,
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DDC_RESULT_FAILED_INVALID_OPERATION,
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DDC_RESULT_FAILED_BUFFER_OVERFLOW,
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DDC_RESULT_FAILED_HPD_DISCON
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};
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enum ddc_service_type {
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DDC_SERVICE_TYPE_CONNECTOR,
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DDC_SERVICE_TYPE_DISPLAY_PORT_MST,
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};
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/**
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* display sink capability
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*/
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struct display_sink_capability {
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/* dongle type (DP converter, CV smart dongle) */
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enum display_dongle_type dongle_type;
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/**********************************************************
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capabilities going INTO SINK DEVICE (stream capabilities)
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**********************************************************/
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/* Dongle's downstream count. */
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uint32_t downstrm_sink_count;
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/* Is dongle's downstream count info field (downstrm_sink_count)
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* valid. */
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bool downstrm_sink_count_valid;
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/* Maximum additional audio delay in microsecond (us) */
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uint32_t additional_audio_delay;
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/* Audio latency value in microsecond (us) */
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uint32_t audio_latency;
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/* Interlace video latency value in microsecond (us) */
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uint32_t video_latency_interlace;
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/* Progressive video latency value in microsecond (us) */
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uint32_t video_latency_progressive;
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/* Dongle caps: Maximum pixel clock supported over dongle for HDMI */
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uint32_t max_hdmi_pixel_clock;
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/* Dongle caps: Maximum deep color supported over dongle for HDMI */
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enum dc_color_depth max_hdmi_deep_color;
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/************************************************************
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capabilities going OUT OF SOURCE DEVICE (link capabilities)
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************************************************************/
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/* support for Spread Spectrum(SS) */
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bool ss_supported;
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/* DP link settings (laneCount, linkRate, Spread) */
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uint32_t dp_link_lane_count;
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uint32_t dp_link_rate;
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uint32_t dp_link_spead;
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/* If dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER,
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indicates 'Frame Sequential-to-lllFrame Pack' conversion capability.*/
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bool is_dp_hdmi_s3d_converter;
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/* to check if we have queried the display capability
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* for eDP panel already. */
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bool is_edp_sink_cap_valid;
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enum ddc_transaction_type transaction_type;
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enum signal_type signal;
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};
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struct av_sync_data {
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uint8_t av_granularity;/* DPCD 00023h */
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uint8_t aud_dec_lat1;/* DPCD 00024h */
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uint8_t aud_dec_lat2;/* DPCD 00025h */
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uint8_t aud_pp_lat1;/* DPCD 00026h */
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uint8_t aud_pp_lat2;/* DPCD 00027h */
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uint8_t vid_inter_lat;/* DPCD 00028h */
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uint8_t vid_prog_lat;/* DPCD 00029h */
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uint8_t aud_del_ins1;/* DPCD 0002Bh */
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uint8_t aud_del_ins2;/* DPCD 0002Ch */
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uint8_t aud_del_ins3;/* DPCD 0002Dh */
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};
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/*Travis*/
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static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT";
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/*Nutmeg*/
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static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA";
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/*DP to Dual link DVI converter*/
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static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa";
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#endif /* __DAL_DDC_SERVICE_TYPES_H__ */
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