/*
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* Copyright 2012-15 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef __AUDIO_TYPES_H__
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#define __AUDIO_TYPES_H__
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#include "signal_types.h"
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#define AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS 20
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#define MAX_HW_AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS 18
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#define MULTI_CHANNEL_SPLIT_NO_ASSO_INFO 0xFFFFFFFF
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struct audio_crtc_info {
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uint32_t h_total;
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uint32_t h_active;
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uint32_t v_active;
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uint32_t pixel_repetition;
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uint32_t requested_pixel_clock_100Hz; /* in 100Hz */
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uint32_t calculated_pixel_clock_100Hz; /* in 100Hz */
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uint32_t refresh_rate;
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enum dc_color_depth color_depth;
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bool interlaced;
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};
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struct azalia_clock_info {
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uint32_t pixel_clock_in_10khz;
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uint32_t audio_dto_phase;
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uint32_t audio_dto_module;
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uint32_t audio_dto_wall_clock_ratio;
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};
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enum audio_dto_source {
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DTO_SOURCE_UNKNOWN = 0,
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DTO_SOURCE_ID0,
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DTO_SOURCE_ID1,
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DTO_SOURCE_ID2,
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DTO_SOURCE_ID3,
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DTO_SOURCE_ID4,
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DTO_SOURCE_ID5
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};
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/* PLL information required for AZALIA DTO calculation */
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struct audio_pll_info {
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uint32_t dp_dto_source_clock_in_khz;
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uint32_t feed_back_divider;
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enum audio_dto_source dto_source;
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bool ss_enabled;
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uint32_t ss_percentage;
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uint32_t ss_percentage_divider;
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};
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struct audio_channel_associate_info {
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union {
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struct {
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uint32_t ALL_CHANNEL_FL:4;
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uint32_t ALL_CHANNEL_FR:4;
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uint32_t ALL_CHANNEL_FC:4;
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uint32_t ALL_CHANNEL_Sub:4;
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uint32_t ALL_CHANNEL_SL:4;
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uint32_t ALL_CHANNEL_SR:4;
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uint32_t ALL_CHANNEL_BL:4;
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uint32_t ALL_CHANNEL_BR:4;
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} bits;
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uint32_t u32all;
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};
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};
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struct audio_output {
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/* Front DIG id. */
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enum engine_id engine_id;
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/* encoder output signal */
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enum signal_type signal;
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/* video timing */
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struct audio_crtc_info crtc_info;
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/* PLL for audio */
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struct audio_pll_info pll_info;
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};
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enum audio_payload {
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CHANNEL_SPLIT_MAPPINGCHANG = 0x9,
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};
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#endif /* __AUDIO_TYPES_H__ */
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