/*
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* Copyright 2012-15 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#ifndef DC_DDC_TYPES_H_
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#define DC_DDC_TYPES_H_
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enum aux_transaction_type {
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AUX_TRANSACTION_TYPE_DP,
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AUX_TRANSACTION_TYPE_I2C
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};
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enum i2caux_transaction_action {
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I2CAUX_TRANSACTION_ACTION_I2C_WRITE = 0x00,
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I2CAUX_TRANSACTION_ACTION_I2C_READ = 0x10,
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I2CAUX_TRANSACTION_ACTION_I2C_STATUS_REQUEST = 0x20,
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I2CAUX_TRANSACTION_ACTION_I2C_WRITE_MOT = 0x40,
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I2CAUX_TRANSACTION_ACTION_I2C_READ_MOT = 0x50,
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I2CAUX_TRANSACTION_ACTION_I2C_STATUS_REQUEST_MOT = 0x60,
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I2CAUX_TRANSACTION_ACTION_DP_WRITE = 0x80,
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I2CAUX_TRANSACTION_ACTION_DP_READ = 0x90
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};
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enum aux_channel_operation_result {
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AUX_CHANNEL_OPERATION_SUCCEEDED,
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AUX_CHANNEL_OPERATION_FAILED_REASON_UNKNOWN,
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AUX_CHANNEL_OPERATION_FAILED_INVALID_REPLY,
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AUX_CHANNEL_OPERATION_FAILED_TIMEOUT,
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AUX_CHANNEL_OPERATION_FAILED_HPD_DISCON,
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AUX_CHANNEL_OPERATION_FAILED_ENGINE_ACQUIRE
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};
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struct aux_request_transaction_data {
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enum aux_transaction_type type;
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enum i2caux_transaction_action action;
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/* 20-bit AUX channel transaction address */
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uint32_t address;
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/* delay, in 100-microsecond units */
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uint8_t delay;
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uint32_t length;
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uint8_t *data;
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};
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enum aux_transaction_reply {
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AUX_TRANSACTION_REPLY_AUX_ACK = 0x00,
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AUX_TRANSACTION_REPLY_AUX_NACK = 0x01,
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AUX_TRANSACTION_REPLY_AUX_DEFER = 0x02,
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AUX_TRANSACTION_REPLY_I2C_OVER_AUX_NACK = 0x04,
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AUX_TRANSACTION_REPLY_I2C_OVER_AUX_DEFER = 0x08,
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AUX_TRANSACTION_REPLY_I2C_ACK = 0x00,
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AUX_TRANSACTION_REPLY_I2C_NACK = 0x10,
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AUX_TRANSACTION_REPLY_I2C_DEFER = 0x20,
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AUX_TRANSACTION_REPLY_HPD_DISCON = 0x40,
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AUX_TRANSACTION_REPLY_INVALID = 0xFF
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};
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struct aux_reply_transaction_data {
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enum aux_transaction_reply status;
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uint32_t length;
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uint8_t *data;
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};
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struct i2c_payload {
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bool write;
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uint8_t address;
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uint32_t length;
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uint8_t *data;
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};
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enum i2c_command_engine {
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I2C_COMMAND_ENGINE_DEFAULT,
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I2C_COMMAND_ENGINE_SW,
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I2C_COMMAND_ENGINE_HW
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};
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struct i2c_command {
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struct i2c_payload *payloads;
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uint8_t number_of_payloads;
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enum i2c_command_engine engine;
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/* expressed in KHz
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* zero means "use default value" */
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uint32_t speed;
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};
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struct gpio_ddc_hw_info {
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bool hw_supported;
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uint32_t ddc_channel;
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};
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struct ddc {
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struct gpio *pin_data;
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struct gpio *pin_clock;
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struct gpio_ddc_hw_info hw_info;
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struct dc_context *ctx;
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};
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union ddc_wa {
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struct {
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uint32_t DP_SKIP_POWER_OFF:1;
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uint32_t DP_AUX_POWER_UP_WA_DELAY:1;
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} bits;
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uint32_t raw;
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};
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struct ddc_flags {
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uint8_t EDID_QUERY_DONE_ONCE:1;
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uint8_t IS_INTERNAL_DISPLAY:1;
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uint8_t FORCE_READ_REPEATED_START:1;
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uint8_t EDID_STRESS_READ:1;
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};
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enum ddc_transaction_type {
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DDC_TRANSACTION_TYPE_NONE = 0,
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DDC_TRANSACTION_TYPE_I2C,
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DDC_TRANSACTION_TYPE_I2C_OVER_AUX,
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DDC_TRANSACTION_TYPE_I2C_OVER_AUX_WITH_DEFER,
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DDC_TRANSACTION_TYPE_I2C_OVER_AUX_RETRY_DEFER
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};
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enum display_dongle_type {
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DISPLAY_DONGLE_NONE = 0,
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/* Active converter types*/
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DISPLAY_DONGLE_DP_VGA_CONVERTER,
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DISPLAY_DONGLE_DP_DVI_CONVERTER,
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DISPLAY_DONGLE_DP_HDMI_CONVERTER,
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/* DP-HDMI/DVI passive dongles (Type 1 and Type 2)*/
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DISPLAY_DONGLE_DP_DVI_DONGLE,
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DISPLAY_DONGLE_DP_HDMI_DONGLE,
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/* Other types of dongle*/
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DISPLAY_DONGLE_DP_HDMI_MISMATCHED_DONGLE,
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};
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struct ddc_service {
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struct ddc *ddc_pin;
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struct ddc_flags flags;
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union ddc_wa wa;
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enum ddc_transaction_type transaction_type;
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enum display_dongle_type dongle_type;
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struct dc_context *ctx;
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struct dc_link *link;
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uint32_t address;
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uint32_t edid_buf_len;
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uint8_t edid_buf[DC_MAX_EDID_BUFFER_SIZE];
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};
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#endif /* DC_DDC_TYPES_H_ */
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