/*
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* Copyright 2012-15 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: AMD
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*
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*/
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#include <linux/slab.h>
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#include "dm_services.h"
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#include "dm_helpers.h"
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#include "gpio_service_interface.h"
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#include "include/ddc_service_types.h"
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#include "include/grph_object_id.h"
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#include "include/dpcd_defs.h"
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#include "include/logger_interface.h"
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#include "include/vector.h"
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#include "core_types.h"
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#include "dc_link_ddc.h"
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#include "dce/dce_aux.h"
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#define AUX_POWER_UP_WA_DELAY 500
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#define I2C_OVER_AUX_DEFER_WA_DELAY 70
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/* CV smart dongle slave address for retrieving supported HDTV modes*/
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#define CV_SMART_DONGLE_ADDRESS 0x20
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/* DVI-HDMI dongle slave address for retrieving dongle signature*/
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#define DVI_HDMI_DONGLE_ADDRESS 0x68
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struct dvi_hdmi_dongle_signature_data {
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int8_t vendor[3];/* "AMD" */
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uint8_t version[2];
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uint8_t size;
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int8_t id[11];/* "6140063500G"*/
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};
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/* DP-HDMI dongle slave address for retrieving dongle signature*/
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#define DP_HDMI_DONGLE_ADDRESS 0x40
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static const uint8_t dp_hdmi_dongle_signature_str[] = "DP-HDMI ADAPTOR";
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#define DP_HDMI_DONGLE_SIGNATURE_EOT 0x04
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struct dp_hdmi_dongle_signature_data {
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int8_t id[15];/* "DP-HDMI ADAPTOR"*/
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uint8_t eot;/* end of transmition '\x4' */
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};
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/* SCDC Address defines (HDMI 2.0)*/
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#define HDMI_SCDC_WRITE_UPDATE_0_ARRAY 3
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#define HDMI_SCDC_ADDRESS 0x54
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#define HDMI_SCDC_SINK_VERSION 0x01
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#define HDMI_SCDC_SOURCE_VERSION 0x02
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#define HDMI_SCDC_UPDATE_0 0x10
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#define HDMI_SCDC_TMDS_CONFIG 0x20
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#define HDMI_SCDC_SCRAMBLER_STATUS 0x21
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#define HDMI_SCDC_CONFIG_0 0x30
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#define HDMI_SCDC_STATUS_FLAGS 0x40
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#define HDMI_SCDC_ERR_DETECT 0x50
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#define HDMI_SCDC_TEST_CONFIG 0xC0
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union hdmi_scdc_update_read_data {
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uint8_t byte[2];
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struct {
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uint8_t STATUS_UPDATE:1;
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uint8_t CED_UPDATE:1;
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uint8_t RR_TEST:1;
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uint8_t RESERVED:5;
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uint8_t RESERVED2:8;
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} fields;
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};
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union hdmi_scdc_status_flags_data {
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uint8_t byte[2];
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struct {
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uint8_t CLOCK_DETECTED:1;
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uint8_t CH0_LOCKED:1;
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uint8_t CH1_LOCKED:1;
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uint8_t CH2_LOCKED:1;
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uint8_t RESERVED:4;
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uint8_t RESERVED2:8;
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uint8_t RESERVED3:8;
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} fields;
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};
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union hdmi_scdc_ced_data {
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uint8_t byte[7];
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struct {
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uint8_t CH0_8LOW:8;
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uint8_t CH0_7HIGH:7;
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uint8_t CH0_VALID:1;
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uint8_t CH1_8LOW:8;
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uint8_t CH1_7HIGH:7;
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uint8_t CH1_VALID:1;
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uint8_t CH2_8LOW:8;
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uint8_t CH2_7HIGH:7;
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uint8_t CH2_VALID:1;
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uint8_t CHECKSUM:8;
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uint8_t RESERVED:8;
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uint8_t RESERVED2:8;
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uint8_t RESERVED3:8;
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uint8_t RESERVED4:4;
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} fields;
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};
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struct i2c_payloads {
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struct vector payloads;
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};
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struct aux_payloads {
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struct vector payloads;
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};
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static bool dal_ddc_i2c_payloads_create(
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struct dc_context *ctx,
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struct i2c_payloads *payloads,
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uint32_t count)
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{
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if (dal_vector_construct(
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&payloads->payloads, ctx, count, sizeof(struct i2c_payload)))
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return true;
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return false;
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}
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static struct i2c_payload *dal_ddc_i2c_payloads_get(struct i2c_payloads *p)
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{
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return (struct i2c_payload *)p->payloads.container;
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}
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static uint32_t dal_ddc_i2c_payloads_get_count(struct i2c_payloads *p)
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{
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return p->payloads.count;
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}
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#define DDC_MIN(a, b) (((a) < (b)) ? (a) : (b))
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void dal_ddc_i2c_payloads_add(
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struct i2c_payloads *payloads,
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uint32_t address,
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uint32_t len,
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uint8_t *data,
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bool write)
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{
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uint32_t payload_size = EDID_SEGMENT_SIZE;
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uint32_t pos;
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for (pos = 0; pos < len; pos += payload_size) {
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struct i2c_payload payload = {
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.write = write,
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.address = address,
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.length = DDC_MIN(payload_size, len - pos),
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.data = data + pos };
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dal_vector_append(&payloads->payloads, &payload);
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}
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}
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static void ddc_service_construct(
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struct ddc_service *ddc_service,
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struct ddc_service_init_data *init_data)
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{
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enum connector_id connector_id =
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dal_graphics_object_id_get_connector_id(init_data->id);
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struct gpio_service *gpio_service = init_data->ctx->gpio_service;
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struct graphics_object_i2c_info i2c_info;
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struct gpio_ddc_hw_info hw_info;
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struct dc_bios *dcb = init_data->ctx->dc_bios;
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ddc_service->link = init_data->link;
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ddc_service->ctx = init_data->ctx;
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if (BP_RESULT_OK != dcb->funcs->get_i2c_info(dcb, init_data->id, &i2c_info)) {
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ddc_service->ddc_pin = NULL;
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} else {
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hw_info.ddc_channel = i2c_info.i2c_line;
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if (ddc_service->link != NULL)
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hw_info.hw_supported = i2c_info.i2c_hw_assist;
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else
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hw_info.hw_supported = false;
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ddc_service->ddc_pin = dal_gpio_create_ddc(
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gpio_service,
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i2c_info.gpio_info.clk_a_register_index,
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1 << i2c_info.gpio_info.clk_a_shift,
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&hw_info);
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}
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ddc_service->flags.EDID_QUERY_DONE_ONCE = false;
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ddc_service->flags.FORCE_READ_REPEATED_START = false;
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ddc_service->flags.EDID_STRESS_READ = false;
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ddc_service->flags.IS_INTERNAL_DISPLAY =
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connector_id == CONNECTOR_ID_EDP ||
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connector_id == CONNECTOR_ID_LVDS;
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ddc_service->wa.raw = 0;
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}
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struct ddc_service *dal_ddc_service_create(
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struct ddc_service_init_data *init_data)
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{
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struct ddc_service *ddc_service;
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ddc_service = kzalloc(sizeof(struct ddc_service), GFP_KERNEL);
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if (!ddc_service)
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return NULL;
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ddc_service_construct(ddc_service, init_data);
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return ddc_service;
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}
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static void ddc_service_destruct(struct ddc_service *ddc)
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{
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if (ddc->ddc_pin)
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dal_gpio_destroy_ddc(&ddc->ddc_pin);
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}
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void dal_ddc_service_destroy(struct ddc_service **ddc)
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{
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if (!ddc || !*ddc) {
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BREAK_TO_DEBUGGER();
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return;
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}
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ddc_service_destruct(*ddc);
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kfree(*ddc);
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*ddc = NULL;
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}
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enum ddc_service_type dal_ddc_service_get_type(struct ddc_service *ddc)
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{
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return DDC_SERVICE_TYPE_CONNECTOR;
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}
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void dal_ddc_service_set_transaction_type(
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struct ddc_service *ddc,
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enum ddc_transaction_type type)
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{
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ddc->transaction_type = type;
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}
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bool dal_ddc_service_is_in_aux_transaction_mode(struct ddc_service *ddc)
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{
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switch (ddc->transaction_type) {
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case DDC_TRANSACTION_TYPE_I2C_OVER_AUX:
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case DDC_TRANSACTION_TYPE_I2C_OVER_AUX_WITH_DEFER:
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case DDC_TRANSACTION_TYPE_I2C_OVER_AUX_RETRY_DEFER:
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return true;
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default:
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break;
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}
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return false;
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}
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void ddc_service_set_dongle_type(struct ddc_service *ddc,
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enum display_dongle_type dongle_type)
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{
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ddc->dongle_type = dongle_type;
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}
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static uint32_t defer_delay_converter_wa(
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struct ddc_service *ddc,
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uint32_t defer_delay)
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{
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struct dc_link *link = ddc->link;
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if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 &&
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!memcmp(link->dpcd_caps.branch_dev_name,
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DP_DVI_CONVERTER_ID_4,
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sizeof(link->dpcd_caps.branch_dev_name)))
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return defer_delay > I2C_OVER_AUX_DEFER_WA_DELAY ?
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defer_delay : I2C_OVER_AUX_DEFER_WA_DELAY;
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return defer_delay;
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}
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#define DP_TRANSLATOR_DELAY 5
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uint32_t get_defer_delay(struct ddc_service *ddc)
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{
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uint32_t defer_delay = 0;
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switch (ddc->transaction_type) {
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case DDC_TRANSACTION_TYPE_I2C_OVER_AUX:
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if ((DISPLAY_DONGLE_DP_VGA_CONVERTER == ddc->dongle_type) ||
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(DISPLAY_DONGLE_DP_DVI_CONVERTER == ddc->dongle_type) ||
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(DISPLAY_DONGLE_DP_HDMI_CONVERTER ==
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ddc->dongle_type)) {
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defer_delay = DP_TRANSLATOR_DELAY;
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defer_delay =
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defer_delay_converter_wa(ddc, defer_delay);
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} else /*sink has a delay different from an Active Converter*/
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defer_delay = 0;
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break;
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case DDC_TRANSACTION_TYPE_I2C_OVER_AUX_WITH_DEFER:
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defer_delay = DP_TRANSLATOR_DELAY;
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break;
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default:
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break;
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}
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return defer_delay;
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}
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static bool i2c_read(
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struct ddc_service *ddc,
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uint32_t address,
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uint8_t *buffer,
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uint32_t len)
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{
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uint8_t offs_data = 0;
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struct i2c_payload payloads[2] = {
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{
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.write = true,
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.address = address,
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.length = 1,
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.data = &offs_data },
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{
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.write = false,
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.address = address,
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.length = len,
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.data = buffer } };
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struct i2c_command command = {
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.payloads = payloads,
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.number_of_payloads = 2,
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.engine = DDC_I2C_COMMAND_ENGINE,
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.speed = ddc->ctx->dc->caps.i2c_speed_in_khz };
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return dm_helpers_submit_i2c(
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ddc->ctx,
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ddc->link,
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&command);
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}
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void dal_ddc_service_i2c_query_dp_dual_mode_adaptor(
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struct ddc_service *ddc,
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struct display_sink_capability *sink_cap)
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{
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uint8_t i;
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bool is_valid_hdmi_signature;
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enum display_dongle_type *dongle = &sink_cap->dongle_type;
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uint8_t type2_dongle_buf[DP_ADAPTOR_TYPE2_SIZE];
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bool is_type2_dongle = false;
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int retry_count = 2;
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struct dp_hdmi_dongle_signature_data *dongle_signature;
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/* Assume we have no valid DP passive dongle connected */
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*dongle = DISPLAY_DONGLE_NONE;
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sink_cap->max_hdmi_pixel_clock = DP_ADAPTOR_HDMI_SAFE_MAX_TMDS_CLK;
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/* Read DP-HDMI dongle I2c (no response interpreted as DP-DVI dongle)*/
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if (!i2c_read(
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ddc,
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DP_HDMI_DONGLE_ADDRESS,
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type2_dongle_buf,
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sizeof(type2_dongle_buf))) {
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/* Passive HDMI dongles can sometimes fail here without retrying*/
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while (retry_count > 0) {
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if (i2c_read(ddc,
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DP_HDMI_DONGLE_ADDRESS,
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type2_dongle_buf,
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sizeof(type2_dongle_buf)))
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break;
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retry_count--;
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}
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if (retry_count == 0) {
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*dongle = DISPLAY_DONGLE_DP_DVI_DONGLE;
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sink_cap->max_hdmi_pixel_clock = DP_ADAPTOR_DVI_MAX_TMDS_CLK;
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CONN_DATA_DETECT(ddc->link, type2_dongle_buf, sizeof(type2_dongle_buf),
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"DP-DVI passive dongle %dMhz: ",
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DP_ADAPTOR_DVI_MAX_TMDS_CLK / 1000);
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return;
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}
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}
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/* Check if Type 2 dongle.*/
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if (type2_dongle_buf[DP_ADAPTOR_TYPE2_REG_ID] == DP_ADAPTOR_TYPE2_ID)
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is_type2_dongle = true;
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dongle_signature =
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(struct dp_hdmi_dongle_signature_data *)type2_dongle_buf;
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is_valid_hdmi_signature = true;
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/* Check EOT */
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if (dongle_signature->eot != DP_HDMI_DONGLE_SIGNATURE_EOT) {
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is_valid_hdmi_signature = false;
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}
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/* Check signature */
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for (i = 0; i < sizeof(dongle_signature->id); ++i) {
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/* If its not the right signature,
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* skip mismatch in subversion byte.*/
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if (dongle_signature->id[i] !=
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dp_hdmi_dongle_signature_str[i] && i != 3) {
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if (is_type2_dongle) {
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is_valid_hdmi_signature = false;
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break;
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}
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}
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}
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if (is_type2_dongle) {
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uint32_t max_tmds_clk =
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type2_dongle_buf[DP_ADAPTOR_TYPE2_REG_MAX_TMDS_CLK];
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max_tmds_clk = max_tmds_clk * 2 + max_tmds_clk / 2;
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if (0 == max_tmds_clk ||
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max_tmds_clk < DP_ADAPTOR_TYPE2_MIN_TMDS_CLK ||
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max_tmds_clk > DP_ADAPTOR_TYPE2_MAX_TMDS_CLK) {
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*dongle = DISPLAY_DONGLE_DP_DVI_DONGLE;
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CONN_DATA_DETECT(ddc->link, type2_dongle_buf,
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sizeof(type2_dongle_buf),
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"DP-DVI passive dongle %dMhz: ",
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DP_ADAPTOR_DVI_MAX_TMDS_CLK / 1000);
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} else {
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if (is_valid_hdmi_signature == true) {
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*dongle = DISPLAY_DONGLE_DP_HDMI_DONGLE;
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CONN_DATA_DETECT(ddc->link, type2_dongle_buf,
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sizeof(type2_dongle_buf),
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"Type 2 DP-HDMI passive dongle %dMhz: ",
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max_tmds_clk);
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} else {
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*dongle = DISPLAY_DONGLE_DP_HDMI_MISMATCHED_DONGLE;
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CONN_DATA_DETECT(ddc->link, type2_dongle_buf,
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sizeof(type2_dongle_buf),
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"Type 2 DP-HDMI passive dongle (no signature) %dMhz: ",
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max_tmds_clk);
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}
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/* Multiply by 1000 to convert to kHz. */
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sink_cap->max_hdmi_pixel_clock =
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max_tmds_clk * 1000;
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}
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} else {
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if (is_valid_hdmi_signature == true) {
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*dongle = DISPLAY_DONGLE_DP_HDMI_DONGLE;
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CONN_DATA_DETECT(ddc->link, type2_dongle_buf,
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sizeof(type2_dongle_buf),
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"Type 1 DP-HDMI passive dongle %dMhz: ",
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sink_cap->max_hdmi_pixel_clock / 1000);
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} else {
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*dongle = DISPLAY_DONGLE_DP_HDMI_MISMATCHED_DONGLE;
|
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CONN_DATA_DETECT(ddc->link, type2_dongle_buf,
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sizeof(type2_dongle_buf),
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"Type 1 DP-HDMI passive dongle (no signature) %dMhz: ",
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sink_cap->max_hdmi_pixel_clock / 1000);
|
}
|
}
|
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return;
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}
|
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enum {
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DP_SINK_CAP_SIZE =
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DP_EDP_CONFIGURATION_CAP - DP_DPCD_REV + 1
|
};
|
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bool dal_ddc_service_query_ddc_data(
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struct ddc_service *ddc,
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uint32_t address,
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uint8_t *write_buf,
|
uint32_t write_size,
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uint8_t *read_buf,
|
uint32_t read_size)
|
{
|
bool success = true;
|
uint32_t payload_size =
|
dal_ddc_service_is_in_aux_transaction_mode(ddc) ?
|
DEFAULT_AUX_MAX_DATA_SIZE : EDID_SEGMENT_SIZE;
|
|
uint32_t write_payloads =
|
(write_size + payload_size - 1) / payload_size;
|
|
uint32_t read_payloads =
|
(read_size + payload_size - 1) / payload_size;
|
|
uint32_t payloads_num = write_payloads + read_payloads;
|
|
|
if (write_size > EDID_SEGMENT_SIZE || read_size > EDID_SEGMENT_SIZE)
|
return false;
|
|
if (!payloads_num)
|
return false;
|
|
/*TODO: len of payload data for i2c and aux is uint8!!!!,
|
* but we want to read 256 over i2c!!!!*/
|
if (dal_ddc_service_is_in_aux_transaction_mode(ddc)) {
|
struct aux_payload payload;
|
|
payload.i2c_over_aux = true;
|
payload.address = address;
|
payload.reply = NULL;
|
payload.defer_delay = get_defer_delay(ddc);
|
|
if (write_size != 0) {
|
payload.write = true;
|
/* should not set mot (middle of transaction) to 0
|
* if there are pending read payloads
|
*/
|
payload.mot = read_size == 0 ? false : true;
|
payload.length = write_size;
|
payload.data = write_buf;
|
|
success = dal_ddc_submit_aux_command(ddc, &payload);
|
}
|
|
if (read_size != 0 && success) {
|
payload.write = false;
|
/* should set mot (middle of transaction) to 0
|
* since it is the last payload to send
|
*/
|
payload.mot = false;
|
payload.length = read_size;
|
payload.data = read_buf;
|
|
success = dal_ddc_submit_aux_command(ddc, &payload);
|
}
|
} else {
|
struct i2c_command command = {0};
|
struct i2c_payloads payloads;
|
|
if (!dal_ddc_i2c_payloads_create(ddc->ctx, &payloads, payloads_num))
|
return false;
|
|
command.payloads = dal_ddc_i2c_payloads_get(&payloads);
|
command.number_of_payloads = 0;
|
command.engine = DDC_I2C_COMMAND_ENGINE;
|
command.speed = ddc->ctx->dc->caps.i2c_speed_in_khz;
|
|
dal_ddc_i2c_payloads_add(
|
&payloads, address, write_size, write_buf, true);
|
|
dal_ddc_i2c_payloads_add(
|
&payloads, address, read_size, read_buf, false);
|
|
command.number_of_payloads =
|
dal_ddc_i2c_payloads_get_count(&payloads);
|
|
success = dm_helpers_submit_i2c(
|
ddc->ctx,
|
ddc->link,
|
&command);
|
|
dal_vector_destruct(&payloads.payloads);
|
}
|
|
return success;
|
}
|
|
bool dal_ddc_submit_aux_command(struct ddc_service *ddc,
|
struct aux_payload *payload)
|
{
|
uint32_t retrieved = 0;
|
bool ret = false;
|
|
if (!ddc)
|
return false;
|
|
if (!payload)
|
return false;
|
|
do {
|
struct aux_payload current_payload;
|
bool is_end_of_payload = (retrieved + DEFAULT_AUX_MAX_DATA_SIZE) >=
|
payload->length;
|
|
current_payload.address = payload->address;
|
current_payload.data = &payload->data[retrieved];
|
current_payload.defer_delay = payload->defer_delay;
|
current_payload.i2c_over_aux = payload->i2c_over_aux;
|
current_payload.length = is_end_of_payload ?
|
payload->length - retrieved : DEFAULT_AUX_MAX_DATA_SIZE;
|
/* set mot (middle of transaction) to false
|
* if it is the last payload
|
*/
|
current_payload.mot = is_end_of_payload ? payload->mot:true;
|
current_payload.reply = payload->reply;
|
current_payload.write = payload->write;
|
|
ret = dc_link_aux_transfer_with_retries(ddc, ¤t_payload);
|
|
retrieved += current_payload.length;
|
} while (retrieved < payload->length && ret == true);
|
|
return ret;
|
}
|
|
/* dc_link_aux_transfer_raw() - Attempt to transfer
|
* the given aux payload. This function does not perform
|
* retries or handle error states. The reply is returned
|
* in the payload->reply and the result through
|
* *operation_result. Returns the number of bytes transferred,
|
* or -1 on a failure.
|
*/
|
int dc_link_aux_transfer_raw(struct ddc_service *ddc,
|
struct aux_payload *payload,
|
enum aux_channel_operation_result *operation_result)
|
{
|
return dce_aux_transfer_raw(ddc, payload, operation_result);
|
}
|
|
/* dc_link_aux_transfer_with_retries() - Attempt to submit an
|
* aux payload, retrying on timeouts, defers, and busy states
|
* as outlined in the DP spec. Returns true if the request
|
* was successful.
|
*
|
* Unless you want to implement your own retry semantics, this
|
* is probably the one you want.
|
*/
|
bool dc_link_aux_transfer_with_retries(struct ddc_service *ddc,
|
struct aux_payload *payload)
|
{
|
return dce_aux_transfer_with_retries(ddc, payload);
|
}
|
|
|
bool dc_link_aux_try_to_configure_timeout(struct ddc_service *ddc,
|
uint32_t timeout)
|
{
|
bool result = false;
|
struct ddc *ddc_pin = ddc->ddc_pin;
|
|
if (ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]->funcs->configure_timeout) {
|
ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]->funcs->configure_timeout(ddc, timeout);
|
result = true;
|
}
|
return result;
|
}
|
|
/*test only function*/
|
void dal_ddc_service_set_ddc_pin(
|
struct ddc_service *ddc_service,
|
struct ddc *ddc)
|
{
|
ddc_service->ddc_pin = ddc;
|
}
|
|
struct ddc *dal_ddc_service_get_ddc_pin(struct ddc_service *ddc_service)
|
{
|
return ddc_service->ddc_pin;
|
}
|
|
void dal_ddc_service_write_scdc_data(struct ddc_service *ddc_service,
|
uint32_t pix_clk,
|
bool lte_340_scramble)
|
{
|
bool over_340_mhz = pix_clk > 340000 ? 1 : 0;
|
uint8_t slave_address = HDMI_SCDC_ADDRESS;
|
uint8_t offset = HDMI_SCDC_SINK_VERSION;
|
uint8_t sink_version = 0;
|
uint8_t write_buffer[2] = {0};
|
/*Lower than 340 Scramble bit from SCDC caps*/
|
|
if (ddc_service->link->local_sink &&
|
ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite)
|
return;
|
|
dal_ddc_service_query_ddc_data(ddc_service, slave_address, &offset,
|
sizeof(offset), &sink_version, sizeof(sink_version));
|
if (sink_version == 1) {
|
/*Source Version = 1*/
|
write_buffer[0] = HDMI_SCDC_SOURCE_VERSION;
|
write_buffer[1] = 1;
|
dal_ddc_service_query_ddc_data(ddc_service, slave_address,
|
write_buffer, sizeof(write_buffer), NULL, 0);
|
/*Read Request from SCDC caps*/
|
}
|
write_buffer[0] = HDMI_SCDC_TMDS_CONFIG;
|
|
if (over_340_mhz) {
|
write_buffer[1] = 3;
|
} else if (lte_340_scramble) {
|
write_buffer[1] = 1;
|
} else {
|
write_buffer[1] = 0;
|
}
|
dal_ddc_service_query_ddc_data(ddc_service, slave_address, write_buffer,
|
sizeof(write_buffer), NULL, 0);
|
}
|
|
void dal_ddc_service_read_scdc_data(struct ddc_service *ddc_service)
|
{
|
uint8_t slave_address = HDMI_SCDC_ADDRESS;
|
uint8_t offset = HDMI_SCDC_TMDS_CONFIG;
|
uint8_t tmds_config = 0;
|
|
if (ddc_service->link->local_sink &&
|
ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite)
|
return;
|
|
dal_ddc_service_query_ddc_data(ddc_service, slave_address, &offset,
|
sizeof(offset), &tmds_config, sizeof(tmds_config));
|
if (tmds_config & 0x1) {
|
union hdmi_scdc_status_flags_data status_data = { {0} };
|
uint8_t scramble_status = 0;
|
|
offset = HDMI_SCDC_SCRAMBLER_STATUS;
|
dal_ddc_service_query_ddc_data(ddc_service, slave_address,
|
&offset, sizeof(offset), &scramble_status,
|
sizeof(scramble_status));
|
offset = HDMI_SCDC_STATUS_FLAGS;
|
dal_ddc_service_query_ddc_data(ddc_service, slave_address,
|
&offset, sizeof(offset), status_data.byte,
|
sizeof(status_data.byte));
|
}
|
}
|
