/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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/*
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* dc_debug.c
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*
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* Created on: Nov 3, 2016
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* Author: yonsun
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*/
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#include "dm_services.h"
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#include "dc.h"
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#include "core_status.h"
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#include "core_types.h"
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#include "resource.h"
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#define DC_LOGGER_INIT(logger)
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#define SURFACE_TRACE(...) do {\
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if (dc->debug.surface_trace) \
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DC_LOG_IF_TRACE(__VA_ARGS__); \
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} while (0)
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#define TIMING_TRACE(...) do {\
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if (dc->debug.timing_trace) \
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DC_LOG_SYNC(__VA_ARGS__); \
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} while (0)
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#define CLOCK_TRACE(...) do {\
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if (dc->debug.clock_trace) \
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DC_LOG_BANDWIDTH_CALCS(__VA_ARGS__); \
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} while (0)
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void pre_surface_trace(
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struct dc *dc,
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const struct dc_plane_state *const *plane_states,
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int surface_count)
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{
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int i;
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DC_LOGGER_INIT(dc->ctx->logger);
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for (i = 0; i < surface_count; i++) {
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const struct dc_plane_state *plane_state = plane_states[i];
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SURFACE_TRACE("Planes %d:\n", i);
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SURFACE_TRACE(
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"plane_state->visible = %d;\n"
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"plane_state->flip_immediate = %d;\n"
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"plane_state->address.type = %d;\n"
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"plane_state->address.grph.addr.quad_part = 0x%llX;\n"
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"plane_state->address.grph.meta_addr.quad_part = 0x%llX;\n"
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"plane_state->scaling_quality.h_taps = %d;\n"
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"plane_state->scaling_quality.v_taps = %d;\n"
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"plane_state->scaling_quality.h_taps_c = %d;\n"
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"plane_state->scaling_quality.v_taps_c = %d;\n",
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plane_state->visible,
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plane_state->flip_immediate,
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plane_state->address.type,
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plane_state->address.grph.addr.quad_part,
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plane_state->address.grph.meta_addr.quad_part,
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plane_state->scaling_quality.h_taps,
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plane_state->scaling_quality.v_taps,
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plane_state->scaling_quality.h_taps_c,
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plane_state->scaling_quality.v_taps_c);
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SURFACE_TRACE(
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"plane_state->src_rect.x = %d;\n"
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"plane_state->src_rect.y = %d;\n"
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"plane_state->src_rect.width = %d;\n"
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"plane_state->src_rect.height = %d;\n"
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"plane_state->dst_rect.x = %d;\n"
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"plane_state->dst_rect.y = %d;\n"
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"plane_state->dst_rect.width = %d;\n"
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"plane_state->dst_rect.height = %d;\n"
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"plane_state->clip_rect.x = %d;\n"
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"plane_state->clip_rect.y = %d;\n"
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"plane_state->clip_rect.width = %d;\n"
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"plane_state->clip_rect.height = %d;\n",
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plane_state->src_rect.x,
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plane_state->src_rect.y,
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plane_state->src_rect.width,
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plane_state->src_rect.height,
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plane_state->dst_rect.x,
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plane_state->dst_rect.y,
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plane_state->dst_rect.width,
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plane_state->dst_rect.height,
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plane_state->clip_rect.x,
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plane_state->clip_rect.y,
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plane_state->clip_rect.width,
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plane_state->clip_rect.height);
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SURFACE_TRACE(
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"plane_state->plane_size.surface_size.x = %d;\n"
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"plane_state->plane_size.surface_size.y = %d;\n"
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"plane_state->plane_size.surface_size.width = %d;\n"
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"plane_state->plane_size.surface_size.height = %d;\n"
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"plane_state->plane_size.surface_pitch = %d;\n",
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plane_state->plane_size.surface_size.x,
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plane_state->plane_size.surface_size.y,
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plane_state->plane_size.surface_size.width,
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plane_state->plane_size.surface_size.height,
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plane_state->plane_size.surface_pitch);
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SURFACE_TRACE(
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"plane_state->tiling_info.gfx8.num_banks = %d;\n"
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"plane_state->tiling_info.gfx8.bank_width = %d;\n"
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"plane_state->tiling_info.gfx8.bank_width_c = %d;\n"
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"plane_state->tiling_info.gfx8.bank_height = %d;\n"
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"plane_state->tiling_info.gfx8.bank_height_c = %d;\n"
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"plane_state->tiling_info.gfx8.tile_aspect = %d;\n"
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"plane_state->tiling_info.gfx8.tile_aspect_c = %d;\n"
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"plane_state->tiling_info.gfx8.tile_split = %d;\n"
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"plane_state->tiling_info.gfx8.tile_split_c = %d;\n"
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"plane_state->tiling_info.gfx8.tile_mode = %d;\n"
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"plane_state->tiling_info.gfx8.tile_mode_c = %d;\n",
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plane_state->tiling_info.gfx8.num_banks,
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plane_state->tiling_info.gfx8.bank_width,
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plane_state->tiling_info.gfx8.bank_width_c,
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plane_state->tiling_info.gfx8.bank_height,
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plane_state->tiling_info.gfx8.bank_height_c,
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plane_state->tiling_info.gfx8.tile_aspect,
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plane_state->tiling_info.gfx8.tile_aspect_c,
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plane_state->tiling_info.gfx8.tile_split,
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plane_state->tiling_info.gfx8.tile_split_c,
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plane_state->tiling_info.gfx8.tile_mode,
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plane_state->tiling_info.gfx8.tile_mode_c);
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SURFACE_TRACE(
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"plane_state->tiling_info.gfx8.pipe_config = %d;\n"
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"plane_state->tiling_info.gfx8.array_mode = %d;\n"
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"plane_state->color_space = %d;\n"
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"plane_state->dcc.enable = %d;\n"
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"plane_state->format = %d;\n"
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"plane_state->rotation = %d;\n"
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"plane_state->stereo_format = %d;\n",
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plane_state->tiling_info.gfx8.pipe_config,
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plane_state->tiling_info.gfx8.array_mode,
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plane_state->color_space,
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plane_state->dcc.enable,
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plane_state->format,
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plane_state->rotation,
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plane_state->stereo_format);
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SURFACE_TRACE("plane_state->tiling_info.gfx9.swizzle = %d;\n",
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plane_state->tiling_info.gfx9.swizzle);
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SURFACE_TRACE("\n");
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}
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SURFACE_TRACE("\n");
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}
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void update_surface_trace(
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struct dc *dc,
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const struct dc_surface_update *updates,
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int surface_count)
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{
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int i;
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DC_LOGGER_INIT(dc->ctx->logger);
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for (i = 0; i < surface_count; i++) {
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const struct dc_surface_update *update = &updates[i];
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SURFACE_TRACE("Update %d\n", i);
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if (update->flip_addr) {
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SURFACE_TRACE("flip_addr->address.type = %d;\n"
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"flip_addr->address.grph.addr.quad_part = 0x%llX;\n"
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"flip_addr->address.grph.meta_addr.quad_part = 0x%llX;\n"
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"flip_addr->flip_immediate = %d;\n",
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update->flip_addr->address.type,
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update->flip_addr->address.grph.addr.quad_part,
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update->flip_addr->address.grph.meta_addr.quad_part,
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update->flip_addr->flip_immediate);
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}
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if (update->plane_info) {
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SURFACE_TRACE(
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"plane_info->color_space = %d;\n"
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"plane_info->format = %d;\n"
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"plane_info->plane_size.surface_pitch = %d;\n"
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"plane_info->plane_size.surface_size.height = %d;\n"
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"plane_info->plane_size.surface_size.width = %d;\n"
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"plane_info->plane_size.surface_size.x = %d;\n"
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"plane_info->plane_size.surface_size.y = %d;\n"
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"plane_info->rotation = %d;\n"
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"plane_info->stereo_format = %d;\n",
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update->plane_info->color_space,
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update->plane_info->format,
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update->plane_info->plane_size.surface_pitch,
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update->plane_info->plane_size.surface_size.height,
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update->plane_info->plane_size.surface_size.width,
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update->plane_info->plane_size.surface_size.x,
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update->plane_info->plane_size.surface_size.y,
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update->plane_info->rotation,
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update->plane_info->stereo_format);
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SURFACE_TRACE(
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"plane_info->tiling_info.gfx8.num_banks = %d;\n"
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"plane_info->tiling_info.gfx8.bank_width = %d;\n"
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"plane_info->tiling_info.gfx8.bank_width_c = %d;\n"
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"plane_info->tiling_info.gfx8.bank_height = %d;\n"
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"plane_info->tiling_info.gfx8.bank_height_c = %d;\n"
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"plane_info->tiling_info.gfx8.tile_aspect = %d;\n"
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"plane_info->tiling_info.gfx8.tile_aspect_c = %d;\n"
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"plane_info->tiling_info.gfx8.tile_split = %d;\n"
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"plane_info->tiling_info.gfx8.tile_split_c = %d;\n"
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"plane_info->tiling_info.gfx8.tile_mode = %d;\n"
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"plane_info->tiling_info.gfx8.tile_mode_c = %d;\n",
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update->plane_info->tiling_info.gfx8.num_banks,
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update->plane_info->tiling_info.gfx8.bank_width,
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update->plane_info->tiling_info.gfx8.bank_width_c,
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update->plane_info->tiling_info.gfx8.bank_height,
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update->plane_info->tiling_info.gfx8.bank_height_c,
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update->plane_info->tiling_info.gfx8.tile_aspect,
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update->plane_info->tiling_info.gfx8.tile_aspect_c,
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update->plane_info->tiling_info.gfx8.tile_split,
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update->plane_info->tiling_info.gfx8.tile_split_c,
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update->plane_info->tiling_info.gfx8.tile_mode,
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update->plane_info->tiling_info.gfx8.tile_mode_c);
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SURFACE_TRACE(
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"plane_info->tiling_info.gfx8.pipe_config = %d;\n"
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"plane_info->tiling_info.gfx8.array_mode = %d;\n"
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"plane_info->visible = %d;\n"
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"plane_info->per_pixel_alpha = %d;\n",
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update->plane_info->tiling_info.gfx8.pipe_config,
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update->plane_info->tiling_info.gfx8.array_mode,
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update->plane_info->visible,
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update->plane_info->per_pixel_alpha);
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SURFACE_TRACE("surface->tiling_info.gfx9.swizzle = %d;\n",
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update->plane_info->tiling_info.gfx9.swizzle);
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}
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if (update->scaling_info) {
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SURFACE_TRACE(
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"scaling_info->src_rect.x = %d;\n"
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"scaling_info->src_rect.y = %d;\n"
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"scaling_info->src_rect.width = %d;\n"
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"scaling_info->src_rect.height = %d;\n"
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"scaling_info->dst_rect.x = %d;\n"
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"scaling_info->dst_rect.y = %d;\n"
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"scaling_info->dst_rect.width = %d;\n"
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"scaling_info->dst_rect.height = %d;\n"
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"scaling_info->clip_rect.x = %d;\n"
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"scaling_info->clip_rect.y = %d;\n"
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"scaling_info->clip_rect.width = %d;\n"
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"scaling_info->clip_rect.height = %d;\n"
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"scaling_info->scaling_quality.h_taps = %d;\n"
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"scaling_info->scaling_quality.v_taps = %d;\n"
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"scaling_info->scaling_quality.h_taps_c = %d;\n"
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"scaling_info->scaling_quality.v_taps_c = %d;\n",
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update->scaling_info->src_rect.x,
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update->scaling_info->src_rect.y,
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update->scaling_info->src_rect.width,
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update->scaling_info->src_rect.height,
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update->scaling_info->dst_rect.x,
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update->scaling_info->dst_rect.y,
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update->scaling_info->dst_rect.width,
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update->scaling_info->dst_rect.height,
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update->scaling_info->clip_rect.x,
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update->scaling_info->clip_rect.y,
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update->scaling_info->clip_rect.width,
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update->scaling_info->clip_rect.height,
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update->scaling_info->scaling_quality.h_taps,
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update->scaling_info->scaling_quality.v_taps,
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update->scaling_info->scaling_quality.h_taps_c,
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update->scaling_info->scaling_quality.v_taps_c);
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}
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SURFACE_TRACE("\n");
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}
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SURFACE_TRACE("\n");
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}
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void post_surface_trace(struct dc *dc)
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{
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DC_LOGGER_INIT(dc->ctx->logger);
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SURFACE_TRACE("post surface process.\n");
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}
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void context_timing_trace(
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struct dc *dc,
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struct resource_context *res_ctx)
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{
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int i;
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int h_pos[MAX_PIPES] = {0}, v_pos[MAX_PIPES] = {0};
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struct crtc_position position;
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unsigned int underlay_idx = dc->res_pool->underlay_pipe_index;
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DC_LOGGER_INIT(dc->ctx->logger);
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for (i = 0; i < dc->res_pool->pipe_count; i++) {
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struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
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/* get_position() returns CRTC vertical/horizontal counter
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* hence not applicable for underlay pipe
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*/
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if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx)
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continue;
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pipe_ctx->stream_res.tg->funcs->get_position(pipe_ctx->stream_res.tg, &position);
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h_pos[i] = position.horizontal_count;
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v_pos[i] = position.vertical_count;
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}
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for (i = 0; i < dc->res_pool->pipe_count; i++) {
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struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
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if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx)
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continue;
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TIMING_TRACE("OTG_%d H_tot:%d V_tot:%d H_pos:%d V_pos:%d\n",
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pipe_ctx->stream_res.tg->inst,
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pipe_ctx->stream->timing.h_total,
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pipe_ctx->stream->timing.v_total,
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h_pos[i], v_pos[i]);
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}
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}
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void context_clock_trace(
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struct dc *dc,
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struct dc_state *context)
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{
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#if defined(CONFIG_DRM_AMD_DC_DCN)
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DC_LOGGER_INIT(dc->ctx->logger);
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CLOCK_TRACE("Current: dispclk_khz:%d max_dppclk_khz:%d dcfclk_khz:%d\n"
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"dcfclk_deep_sleep_khz:%d fclk_khz:%d socclk_khz:%d\n",
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context->bw_ctx.bw.dcn.clk.dispclk_khz,
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context->bw_ctx.bw.dcn.clk.dppclk_khz,
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context->bw_ctx.bw.dcn.clk.dcfclk_khz,
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context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz,
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context->bw_ctx.bw.dcn.clk.fclk_khz,
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context->bw_ctx.bw.dcn.clk.socclk_khz);
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CLOCK_TRACE("Calculated: dispclk_khz:%d max_dppclk_khz:%d dcfclk_khz:%d\n"
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"dcfclk_deep_sleep_khz:%d fclk_khz:%d socclk_khz:%d\n",
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context->bw_ctx.bw.dcn.clk.dispclk_khz,
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context->bw_ctx.bw.dcn.clk.dppclk_khz,
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context->bw_ctx.bw.dcn.clk.dcfclk_khz,
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context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz,
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context->bw_ctx.bw.dcn.clk.fclk_khz,
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context->bw_ctx.bw.dcn.clk.socclk_khz);
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#endif
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}
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/**
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* dc_status_to_str - convert dc_status to a human readable string
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* @status: dc_status to be converted
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*
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* Return:
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* A string describing the DC status.
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*/
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char *dc_status_to_str(enum dc_status status)
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{
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switch (status) {
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case DC_OK:
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return "DC OK";
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case DC_NO_CONTROLLER_RESOURCE:
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return "No controller resource";
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case DC_NO_STREAM_ENC_RESOURCE:
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return "No stream encoder";
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case DC_NO_CLOCK_SOURCE_RESOURCE:
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return "No clock source";
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case DC_FAIL_CONTROLLER_VALIDATE:
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return "Controller validation failure";
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case DC_FAIL_ENC_VALIDATE:
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return "Encoder validation failure";
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case DC_FAIL_ATTACH_SURFACES:
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return "Surfaces attachment failure";
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case DC_FAIL_DETACH_SURFACES:
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return "Surfaces detachment failure";
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case DC_FAIL_SURFACE_VALIDATE:
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return "Surface validation failure";
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case DC_NO_DP_LINK_BANDWIDTH:
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return "No DP link bandwidth";
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case DC_EXCEED_DONGLE_CAP:
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return "Exceed dongle capability";
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case DC_SURFACE_PIXEL_FORMAT_UNSUPPORTED:
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return "Unsupported pixel format";
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case DC_FAIL_BANDWIDTH_VALIDATE:
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return "Bandwidth validation failure (BW and Watermark)";
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case DC_FAIL_SCALING:
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return "Scaling failure";
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case DC_FAIL_DP_LINK_TRAINING:
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return "DP link training failure";
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case DC_FAIL_DSC_VALIDATE:
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return "DSC validation failure";
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case DC_NO_DSC_RESOURCE:
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return "No DSC resource";
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case DC_FAIL_UNSUPPORTED_1:
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return "Unsupported";
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case DC_FAIL_CLK_EXCEED_MAX:
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return "Clk exceed max failure";
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case DC_FAIL_CLK_BELOW_MIN:
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return "Fail clk below minimum";
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case DC_FAIL_CLK_BELOW_CFG_REQUIRED:
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return "Fail clk below required CFG (hard_min in PPLIB)";
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case DC_ERROR_UNEXPECTED:
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return "Unexpected error";
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}
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return "Unexpected status error";
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}
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