/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
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*/
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#ifndef _CCU_SDM_H
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#define _CCU_SDM_H
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#include <linux/clk-provider.h>
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#include "ccu_common.h"
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struct ccu_sdm_setting {
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unsigned long rate;
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/*
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* XXX We don't know what the step and bottom register fields
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* mean. Just copy the whole register value from the vendor
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* kernel for now.
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*/
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u32 pattern;
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/*
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* M and N factors here should be the values used in
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* calculation, not the raw values written to registers
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*/
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u32 m;
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u32 n;
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};
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struct ccu_sdm_internal {
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struct ccu_sdm_setting *table;
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u32 table_size;
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/* early SoCs don't have the SDM enable bit in the PLL register */
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u32 enable;
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/* second enable bit in tuning register */
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u32 tuning_enable;
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u16 tuning_reg;
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};
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#define _SUNXI_CCU_SDM(_table, _enable, \
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_reg, _reg_enable) \
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{ \
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.table = _table, \
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.table_size = ARRAY_SIZE(_table), \
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.enable = _enable, \
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.tuning_enable = _reg_enable, \
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.tuning_reg = _reg, \
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}
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bool ccu_sdm_helper_is_enabled(struct ccu_common *common,
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struct ccu_sdm_internal *sdm);
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void ccu_sdm_helper_enable(struct ccu_common *common,
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struct ccu_sdm_internal *sdm,
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unsigned long rate);
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void ccu_sdm_helper_disable(struct ccu_common *common,
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struct ccu_sdm_internal *sdm);
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bool ccu_sdm_helper_has_rate(struct ccu_common *common,
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struct ccu_sdm_internal *sdm,
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unsigned long rate);
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unsigned long ccu_sdm_helper_read_rate(struct ccu_common *common,
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struct ccu_sdm_internal *sdm,
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u32 m, u32 n);
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int ccu_sdm_helper_get_factors(struct ccu_common *common,
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struct ccu_sdm_internal *sdm,
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unsigned long rate,
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unsigned long *m, unsigned long *n);
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#endif
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